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authorVijay Kumar <vijaykumar@bravegnu.org>2009-08-21 10:27:38 +0530
committerAnthony Liguori <aliguori@us.ibm.com>2009-08-27 20:35:30 -0500
commitd0e7605ee0d91c3737052127a79199ddab3ff653 (patch)
tree5b9394d450e4134a99c3a3d892d7bd0668926390 /hw
parent4c0960c0c483fffc5f8e1dab169d946ac295bf44 (diff)
Check block driver read error in pflash_cfi0x
If a flash file of size smaller than the flash size is specified in the -pflash option, the block driver returns error. But the pflash_cfi0x ignores the error. This results in a flash content of all zeroes. And the simulation aborts while executing code. This patch adds the checks for errors from bdrv_read and escalates it to the calling code. Signed-off-by: Vijay Kumar B. <vijaykumar@bravegnu.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/pflash_cfi01.c8
-rw-r--r--hw/pflash_cfi02.c8
2 files changed, 14 insertions, 2 deletions
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index 6dd39a659d..cef9ffb174 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -507,6 +507,7 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
{
pflash_t *pfl;
target_phys_addr_t total_len;
+ int ret;
total_len = sector_len * nb_blocs;
@@ -530,7 +531,12 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
pfl->bs = bs;
if (pfl->bs) {
/* read the initial flash content */
- bdrv_read(pfl->bs, 0, pfl->storage, total_len >> 9);
+ ret = bdrv_read(pfl->bs, 0, pfl->storage, total_len >> 9);
+ if (ret < 0) {
+ cpu_unregister_io_memory(pfl->fl_mem);
+ qemu_free(pfl);
+ return NULL;
+ }
}
#if 0 /* XXX: there should be a bit to set up read-only,
* the same way the hardware does (with WP pin).
diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c
index a97b9e6772..7f5094b3ed 100644
--- a/hw/pflash_cfi02.c
+++ b/hw/pflash_cfi02.c
@@ -547,6 +547,7 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
{
pflash_t *pfl;
int32_t chip_len;
+ int ret;
chip_len = sector_len * nb_blocs;
/* XXX: to be fixed */
@@ -568,7 +569,12 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
pfl->bs = bs;
if (pfl->bs) {
/* read the initial flash content */
- bdrv_read(pfl->bs, 0, pfl->storage, chip_len >> 9);
+ ret = bdrv_read(pfl->bs, 0, pfl->storage, chip_len >> 9);
+ if (ret < 0) {
+ cpu_unregister_io_memory(pfl->fl_mem);
+ qemu_free(pfl);
+ return NULL;
+ }
}
#if 0 /* XXX: there should be a bit to set up read-only,
* the same way the hardware does (with WP pin).