aboutsummaryrefslogtreecommitdiff
path: root/hw/xtensa/sim.c
diff options
context:
space:
mode:
authorMax Filippov <jcmvbkbc@gmail.com>2018-09-10 16:33:24 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2019-10-18 20:38:10 -0700
commitd9e8553bc8821d72cb72ca95f76b2d8ff6eb628a (patch)
treea9ef8ffa913eb3851dd8a8ee8c485015cc1377bb /hw/xtensa/sim.c
parentd5eaec84e592bb0085f84bef54d0a41e31faa99a (diff)
hw/xtensa: add virt machine
virt machine is a sim machine with generic PCI host controller. Make common parts of sim machine initialization reusable. Add PCI controller at 0xf0000000 with PIO space at its base address, ECAM space at base address + 1M and MMIO space at base address + 64M. Connect IRQ lines to consecutive CPU external IRQ pins starting from 0. Instantiate network interfaces on virt machine. Xtensa linux kernel configuration virt_defconfig can successfully boot on this machine. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'hw/xtensa/sim.c')
-rw-r--r--hw/xtensa/sim.c41
1 files changed, 26 insertions, 15 deletions
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index 981dbb7bbe..a22743a3d6 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -37,6 +37,7 @@
#include "exec/address-spaces.h"
#include "qemu/error-report.h"
#include "xtensa_memory.h"
+#include "xtensa_sim.h"
static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
{
@@ -52,12 +53,11 @@ static void sim_reset(void *opaque)
cpu_reset(CPU(cpu));
}
-static void xtensa_sim_init(MachineState *machine)
+XtensaCPU *xtensa_sim_common_init(MachineState *machine)
{
XtensaCPU *cpu = NULL;
CPUXtensaState *env = NULL;
ram_addr_t ram_size = machine->ram_size;
- const char *kernel_filename = machine->kernel_filename;
int n;
for (n = 0; n < machine->smp.cpus; n++) {
@@ -89,30 +89,41 @@ static void xtensa_sim_init(MachineState *machine)
xtensa_create_memory_regions(&sysram, "xtensa.sysram",
get_system_memory());
}
-
if (serial_hd(0)) {
xtensa_sim_open_console(serial_hd(0));
}
- if (kernel_filename) {
- uint64_t elf_entry;
- uint64_t elf_lowaddr;
+ return cpu;
+}
+
+void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine)
+{
+ const char *kernel_filename = machine->kernel_filename;
#ifdef TARGET_WORDS_BIGENDIAN
- int success = load_elf(kernel_filename, NULL,
- translate_phys_addr, cpu,
- &elf_entry, &elf_lowaddr,
- NULL, 1, EM_XTENSA, 0, 0);
+ int big_endian = true;
#else
- int success = load_elf(kernel_filename, NULL,
- translate_phys_addr, cpu,
- &elf_entry, &elf_lowaddr,
- NULL, 0, EM_XTENSA, 0, 0);
+ int big_endian = false;
#endif
+
+ if (kernel_filename) {
+ uint64_t elf_entry;
+ uint64_t elf_lowaddr;
+ int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
+ &elf_entry, &elf_lowaddr, NULL, big_endian,
+ EM_XTENSA, 0, 0);
+
if (success > 0) {
- env->pc = elf_entry;
+ cpu->env.pc = elf_entry;
}
}
}
+static void xtensa_sim_init(MachineState *machine)
+{
+ XtensaCPU *cpu = xtensa_sim_common_init(machine);
+
+ xtensa_sim_load_kernel(cpu, machine);
+}
+
static void xtensa_sim_machine_init(MachineClass *mc)
{
mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";