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authorMarc-André Lureau <marcandre.lureau@redhat.com>2019-01-15 02:27:54 +0400
committerMichael S. Tsirkin <mst@redhat.com>2019-01-17 21:10:57 -0500
commitffab1be70692c55f4c81642f03d629fd84eb4b18 (patch)
treef0a87fc9b9ba448fd50b12d7d70ee5d3a4e95343 /hw/tpm/tpm_tis.c
parentec86c0f678a9402fb4265c8874bd2ec712b33127 (diff)
tpm: clear RAM when "memory overwrite" requested
Note: the "Platform Reset Attack Mitigation" specification isn't explicit about NVDIMM, since they could have different usages. It uses the term "system memory" generally (and also "volatile memory RAM" in its introduction). For initial support, I propose to consider non-volatile memory as not being subject to the memory clear. There is an on-going discussion in the TCG "pcclientwg" working group for future revisions. CPU cache clearing is done unconditionally in edk2 since commit d20ae95a13e851 (edk2-stable201811). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/tpm/tpm_tis.c')
-rw-r--r--hw/tpm/tpm_tis.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c
index 02d9d5c911..fd6bb9b59a 100644
--- a/hw/tpm/tpm_tis.c
+++ b/hw/tpm/tpm_tis.c
@@ -872,6 +872,9 @@ static void tpm_tis_reset(DeviceState *dev)
s->be_buffer_size = MIN(tpm_backend_get_buffer_size(s->be_driver),
TPM_TIS_BUFFER_MAX);
+ if (s->ppi_enabled) {
+ tpm_ppi_reset(&s->ppi);
+ }
tpm_backend_reset(s->be_driver);
s->active_locty = TPM_TIS_NO_LOCALITY;