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authorBeniamino Galvani <b.galvani@gmail.com>2014-03-25 19:22:04 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-04-17 21:34:06 +0100
commit1c70aa6264ea7f3d7be6f3acb65a1e0aac8b3944 (patch)
treeb78ff4ad33b28ef60d80d9f3c34351e8dbd5ff08 /hw/timer
parentf727d0e6219e6d5a9f91326f01b85aa563e37bb9 (diff)
allwinner-a10-pic: set vector address when an interrupt is pending
This patch implements proper updating of the vector register which should hold, according to the A10 user manual, the vector address for the interrupt currently active on the CPU IRQ input. Interrupt priority is not implemented at the moment and thus the first pending interrupt is returned. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Li Guang <lig.fnst@cn.fujitsu.com> Message-id: 1395771730-16882-2-git-send-email-b.galvani@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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