diff options
author | Andreas Färber <andreas.faerber@web.de> | 2013-06-30 20:30:27 +0200 |
---|---|---|
committer | Andreas Färber <afaerber@suse.de> | 2013-11-05 17:47:29 +0100 |
commit | eb110bd843d3ef70850a7cf44d05056b8a3e81aa (patch) | |
tree | 67311ba7f169081f05198cfb6338355e62c35c26 /hw/timer | |
parent | 0aadb4909c330bbde8542fcafc465817530cb835 (diff) |
a9mpcore: Embed ARMMPTimerState
Prepares for QOM realize.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Diffstat (limited to 'hw/timer')
-rw-r--r-- | hw/timer/arm_mptimer.c | 35 |
1 files changed, 4 insertions, 31 deletions
diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index 2853db47f2..d9f9494f26 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -19,7 +19,7 @@ * with this program; if not, see <http://www.gnu.org/licenses/>. */ -#include "hw/sysbus.h" +#include "hw/timer/arm_mptimer.h" #include "qemu/timer.h" #include "qom/cpu.h" @@ -27,34 +27,6 @@ * which is used in both the ARM11MPCore and Cortex-A9MP. */ -#define MAX_CPUS 4 - -/* State of a single timer or watchdog block */ -typedef struct { - uint32_t count; - uint32_t load; - uint32_t control; - uint32_t status; - int64_t tick; - QEMUTimer *timer; - qemu_irq irq; - MemoryRegion iomem; -} TimerBlock; - -#define TYPE_ARM_MPTIMER "arm_mptimer" -#define ARM_MPTIMER(obj) \ - OBJECT_CHECK(ARMMPTimerState, (obj), TYPE_ARM_MPTIMER) - -typedef struct { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - uint32_t num_cpu; - TimerBlock timerblock[MAX_CPUS]; - MemoryRegion iomem; -} ARMMPTimerState; - static inline int get_current_cpu(ARMMPTimerState *s) { if (current_cpu->cpu_index >= s->num_cpu) { @@ -240,8 +212,9 @@ static void arm_mptimer_realize(DeviceState *dev, Error **errp) ARMMPTimerState *s = ARM_MPTIMER(dev); int i; - if (s->num_cpu < 1 || s->num_cpu > MAX_CPUS) { - hw_error("%s: num-cpu must be between 1 and %d\n", __func__, MAX_CPUS); + if (s->num_cpu < 1 || s->num_cpu > ARM_MPTIMER_MAX_CPUS) { + hw_error("%s: num-cpu must be between 1 and %d\n", + __func__, ARM_MPTIMER_MAX_CPUS); } /* We implement one timer block per CPU, and expose multiple MMIO regions: * * region 0 is "timer for this core" |