diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2016-06-20 22:30:34 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-20 22:30:34 +0100 |
commit | b0ad00b8c9f81874df93d2b41e911c260e91a100 (patch) | |
tree | f52c2ca7878b26437173df0802ffe16bb3c052ef /hw/timer | |
parent | 7e13ea57f47710de2c19f22b27b34ab9fb045700 (diff) | |
parent | f52347d5b023dd2ab5518a4faaf2e0cee55c1915 (diff) |
Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging
# gpg: Signature made Mon 20 Jun 2016 21:29:27 BST
# gpg: using RSA key 0x9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/tracing-pull-request: (42 commits)
trace: split out trace events for linux-user/ directory
trace: split out trace events for qom/ directory
trace: split out trace events for target-ppc/ directory
trace: split out trace events for target-s390x/ directory
trace: split out trace events for target-sparc/ directory
trace: split out trace events for net/ directory
trace: split out trace events for audio/ directory
trace: split out trace events for ui/ directory
trace: split out trace events for hw/alpha/ directory
trace: split out trace events for hw/arm/ directory
trace: split out trace events for hw/acpi/ directory
trace: split out trace events for hw/vfio/ directory
trace: split out trace events for hw/s390x/ directory
trace: split out trace events for hw/pci/ directory
trace: split out trace events for hw/ppc/ directory
trace: split out trace events for hw/9pfs/ directory
trace: split out trace events for hw/i386/ directory
trace: split out trace events for hw/isa/ directory
trace: split out trace events for hw/sd/ directory
trace: split out trace events for hw/sparc/ directory
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer')
-rw-r--r-- | hw/timer/trace-events | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/hw/timer/trace-events b/hw/timer/trace-events new file mode 100644 index 0000000000..19db4bfc0b --- /dev/null +++ b/hw/timer/trace-events @@ -0,0 +1,51 @@ +# See docs/trace-events.txt for syntax documentation. + +# hw/timer/slavio_timer.c +slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" +slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" +slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64 +slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" +slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" +slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64 +slavio_timer_mem_writel_counter_invalid(void) "not user timer" +slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" +slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" +slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" +slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" +slavio_timer_mem_writel_mode_invalid(void) "not system timer" +slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64 + +# hw/timer/grlib_gptimer.c +grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" +grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" +grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" +grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" +grlib_gptimer_hit(int id) "timer:%d HIT" +grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" +grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" + +# hw/timer/lm32_timer.c +lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" +lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" +lm32_timer_hit(void) "timer hit" +lm32_timer_irq_state(int level) "irq state %d" + +# hw/timer/milkymist-sysctl.c +milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" +milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" +milkymist_sysctl_icap_write(uint32_t value) "value %08x" +milkymist_sysctl_start_timer0(void) "Start timer0" +milkymist_sysctl_stop_timer0(void) "Stop timer0" +milkymist_sysctl_start_timer1(void) "Start timer1" +milkymist_sysctl_stop_timer1(void) "Stop timer1" +milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" +milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" + +# hw/timer/aspeed_timer.c +aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" +aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" +aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" +aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" +aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32 +aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32 +aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64 |