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| author | Beniamino Galvani <b.galvani@gmail.com> | 2014-03-25 19:22:05 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:06 +0100 |
| commit | 2237094d9619a64b669ca9f7fb1430b9b329f9cf (patch) | |
| tree | a162c4d9943fbed7b8fcc20f74df31ea92a8f74e /hw/timer | |
| parent | 1c70aa6264ea7f3d7be6f3acb65a1e0aac8b3944 (diff) | |
allwinner-a10-pic: fix behaviour of pending register
The pending register is read-only and the value returned upon a read
reflects the state of irq input pins (interrupts are level triggered).
This patch implements such behaviour.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Li Guang <lig.fnst@cn.fujitsu.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1395771730-16882-3-git-send-email-b.galvani@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer')
0 files changed, 0 insertions, 0 deletions