diff options
| author | Alistair Francis <alistair.francis@wdc.com> | 2021-09-09 13:55:02 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-09-21 07:56:49 +1000 |
| commit | 5bf6f1acdda980a4ad0e8f01fe515c6d6e130fce (patch) | |
| tree | edfc73224760fee76047e27d9d2bb52a257e974c /hw/timer/trace-events | |
| parent | 57a3a6226529e60ef4eb5e11b577f2e532a72acc (diff) | |
hw/timer: Add SiFive PWM support
This is the initial commit of the SiFive PWM timer. This is used by
guest software as a timer and is included in the SiFive FU540 SoC.
Signed-off-by: Justin Restivo <jrestivo@draper.com>
Signed-off-by: Alexandra Clifford <aclifford@draper.com>
Signed-off-by: Amanda Strnad <astrnad@draper.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 9f70a210acbfaf0e1ea6ad311ab892ac69134d8b.1631159656.git.alistair.francis@wdc.com
Diffstat (limited to 'hw/timer/trace-events')
| -rw-r--r-- | hw/timer/trace-events | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/timer/trace-events b/hw/timer/trace-events index 5234c0ea9e..d0edcd2a80 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -88,3 +88,9 @@ sse_counter_reset(void) "SSE system counter: reset" sse_timer_read(uint64_t offset, uint64_t data, unsigned size) "SSE system timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" sse_timer_write(uint64_t offset, uint64_t data, unsigned size) "SSE system timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" sse_timer_reset(void) "SSE system timer: reset" + +# sifive_pwm.c +sifive_pwm_set_alarm(uint64_t alarm, uint64_t now) "Setting alarm to: 0x%" PRIx64 ", now: 0x%" PRIx64 +sifive_pwm_interrupt(int num) "Interrupt %d" +sifive_pwm_read(uint64_t offset) "Read at address: 0x%" PRIx64 +sifive_pwm_write(uint64_t data, uint64_t offset) "Write 0x%" PRIx64 " at address: 0x%" PRIx64 |