diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2021-02-19 14:45:44 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-03-08 17:20:01 +0000 |
| commit | 0d10df30384c22c5f683cbfebc42cee6cf83fed4 (patch) | |
| tree | b412ee661ba4e741cbbff65a37808c24dc22759d /hw/timer/trace-events | |
| parent | 446587a914cfa57c2ce529056a9ca2215bde7111 (diff) | |
hw/timer/sse-counter: Model the SSE Subsystem System Counter
The SSE-300 includes a counter module; implement a model of it.
This counter is documented in the SSE-123 Example Subsystem
Technical Reference Manual:
https://developer.arm.com/documentation/101370/latest/
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-12-peter.maydell@linaro.org
Diffstat (limited to 'hw/timer/trace-events')
| -rw-r--r-- | hw/timer/trace-events | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/timer/trace-events b/hw/timer/trace-events index 7a4326d956..bb9c100087 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -93,3 +93,10 @@ avr_timer16_interrupt_count(uint8_t cnt) "count: %u" avr_timer16_interrupt_overflow(const char *reason) "overflow: %s" avr_timer16_next_alarm(uint64_t delay_ns) "next alarm: %" PRIu64 " ns from now" avr_timer16_clksrc_update(uint64_t freq_hz, uint64_t period_ns, uint64_t delay_s) "timer frequency: %" PRIu64 " Hz, period: %" PRIu64 " ns (%" PRId64 " us)" + +# sse_counter.c +sse_counter_control_read(uint64_t offset, uint64_t data, unsigned size) "SSE system counter control frame read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" +sse_counter_control_write(uint64_t offset, uint64_t data, unsigned size) "SSE system counter control framen write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" +sse_counter_status_read(uint64_t offset, uint64_t data, unsigned size) "SSE system counter status frame read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" +sse_counter_status_write(uint64_t offset, uint64_t data, unsigned size) "SSE system counter status frame write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" +sse_counter_reset(void) "SSE system counter: reset" |