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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-19 12:58:30 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-19 12:58:30 +0000
commit5dcb6b914e5b99b64243477a23aea7e2a9852d17 (patch)
treecb2627ac298e49f72e2cd6749c01eb5713e6150d /hw/tcx.c
parent36ddb83bd8fcb587e5d3b759543a13680e6836fb (diff)
Use full 36-bit physical address space on SS10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2830 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/tcx.c')
-rw-r--r--hw/tcx.c24
1 files changed, 11 insertions, 13 deletions
diff --git a/hw/tcx.c b/hw/tcx.c
index 326f458651..80d60baae1 100644
--- a/hw/tcx.c
+++ b/hw/tcx.c
@@ -31,7 +31,7 @@
#define TCX_TEC_NREGS 0x1000
typedef struct TCXState {
- uint32_t addr;
+ target_phys_addr_t addr;
DisplayState *ds;
uint8_t *vram;
uint32_t *vram24, *cplane;
@@ -359,7 +359,6 @@ static void tcx_save(QEMUFile *f, void *opaque)
{
TCXState *s = opaque;
- qemu_put_be32s(f, (uint32_t *)&s->addr);
qemu_put_be32s(f, (uint32_t *)&s->vram);
qemu_put_be32s(f, (uint32_t *)&s->vram24);
qemu_put_be32s(f, (uint32_t *)&s->cplane);
@@ -377,10 +376,9 @@ static int tcx_load(QEMUFile *f, void *opaque, int version_id)
{
TCXState *s = opaque;
- if (version_id != 2)
+ if (version_id != 3)
return -EINVAL;
- qemu_get_be32s(f, (uint32_t *)&s->addr);
qemu_get_be32s(f, (uint32_t *)&s->vram);
qemu_get_be32s(f, (uint32_t *)&s->vram24);
qemu_get_be32s(f, (uint32_t *)&s->cplane);
@@ -492,7 +490,7 @@ static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
tcx_dummy_writel,
};
-void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
+void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
unsigned long vram_offset, int vram_size, int width, int height,
int depth)
{
@@ -513,23 +511,23 @@ void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
// 8-bit plane
s->vram = vram_base;
size = vram_size;
- cpu_register_physical_memory(addr + 0x00800000, size, vram_offset);
+ cpu_register_physical_memory(addr + 0x00800000ULL, size, vram_offset);
vram_offset += size;
vram_base += size;
io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
- cpu_register_physical_memory(addr + 0x00200000, TCX_DAC_NREGS, io_memory);
+ cpu_register_physical_memory(addr + 0x00200000ULL, TCX_DAC_NREGS, io_memory);
dummy_memory = cpu_register_io_memory(0, tcx_dummy_read, tcx_dummy_write,
s);
- cpu_register_physical_memory(addr + 0x00700000, TCX_TEC_NREGS,
+ cpu_register_physical_memory(addr + 0x00700000ULL, TCX_TEC_NREGS,
dummy_memory);
if (depth == 24) {
// 24-bit plane
size = vram_size * 4;
s->vram24 = (uint32_t *)vram_base;
s->vram24_offset = vram_offset;
- cpu_register_physical_memory(addr + 0x02000000, size, vram_offset);
+ cpu_register_physical_memory(addr + 0x02000000ULL, size, vram_offset);
vram_offset += size;
vram_base += size;
@@ -537,20 +535,20 @@ void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
size = vram_size * 4;
s->cplane = (uint32_t *)vram_base;
s->cplane_offset = vram_offset;
- cpu_register_physical_memory(addr + 0x0a000000, size, vram_offset);
+ cpu_register_physical_memory(addr + 0x0a000000ULL, size, vram_offset);
graphic_console_init(s->ds, tcx24_update_display,
tcx24_invalidate_display, tcx24_screen_dump, s);
} else {
- cpu_register_physical_memory(addr + 0x00300000, TCX_THC_NREGS_8,
+ cpu_register_physical_memory(addr + 0x00300000ULL, TCX_THC_NREGS_8,
dummy_memory);
graphic_console_init(s->ds, tcx_update_display, tcx_invalidate_display,
tcx_screen_dump, s);
}
// NetBSD writes here even with 8-bit display
- cpu_register_physical_memory(addr + 0x00301000, TCX_THC_NREGS_24,
+ cpu_register_physical_memory(addr + 0x00301000ULL, TCX_THC_NREGS_24,
dummy_memory);
- register_savevm("tcx", addr, 1, tcx_save, tcx_load, s);
+ register_savevm("tcx", addr, 3, tcx_save, tcx_load, s);
qemu_register_reset(tcx_reset, s);
tcx_reset(s);
dpy_resize(s->ds, width, height);