diff options
| author | Havard Skinnemoen <hskinnemoen@google.com> | 2020-09-10 22:20:57 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-14 14:24:59 +0100 |
| commit | b821242c7b3b174bbf7c01a19c93c4e52fedab5d (patch) | |
| tree | 836833c9a3f007182c6896056517375fa2222ca0 /hw/ssi/meson.build | |
| parent | 1351f892467bd8d9655b43b8fbf10a8d08890612 (diff) | |
hw/ssi: NPCM7xx Flash Interface Unit device model
This implements a device model for the NPCM7xx SPI flash controller.
Direct reads and writes, and user-mode transactions have been tested in
various modes. Protection features are not implemented yet.
All the FIU instances are available in the SoC's address space,
regardless of whether or not they're connected to actual flash chips.
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200911052101.2602693-11-hskinnemoen@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ssi/meson.build')
| -rw-r--r-- | hw/ssi/meson.build | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/ssi/meson.build b/hw/ssi/meson.build index f1f5c287d0..dee00c0da6 100644 --- a/hw/ssi/meson.build +++ b/hw/ssi/meson.build @@ -1,5 +1,6 @@ softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_smc.c')) softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-spi.c')) +softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_fiu.c')) softmmu_ss.add(when: 'CONFIG_PL022', if_true: files('pl022.c')) softmmu_ss.add(when: 'CONFIG_SSI', if_true: files('ssi.c')) softmmu_ss.add(when: 'CONFIG_STM32F2XX_SPI', if_true: files('stm32f2xx_spi.c')) |