diff options
author | Bin Meng <bin.meng@windriver.com> | 2021-01-26 14:00:01 +0800 |
---|---|---|
committer | Alistair Francis <alistair.francis@wdc.com> | 2021-03-04 09:43:29 -0500 |
commit | 0694dabe9763847f3010b54ab3ec7d367d2f0ff0 (patch) | |
tree | a92f68117045ffa9455a2529bd5fe09e52791249 /hw/ssi/meson.build | |
parent | 62d1076678a4c3d2385cc492283061b710bb0a60 (diff) |
hw/ssi: Add SiFive SPI controller support
This adds the SiFive SPI controller model for the FU540 SoC.
The direct memory-mapped SPI flash mode is unsupported.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210126060007.12904-4-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/ssi/meson.build')
-rw-r--r-- | hw/ssi/meson.build | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/ssi/meson.build b/hw/ssi/meson.build index dee00c0da6..3d6bc82ab1 100644 --- a/hw/ssi/meson.build +++ b/hw/ssi/meson.build @@ -2,6 +2,7 @@ softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_smc.c')) softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-spi.c')) softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_fiu.c')) softmmu_ss.add(when: 'CONFIG_PL022', if_true: files('pl022.c')) +softmmu_ss.add(when: 'CONFIG_SIFIVE_SPI', if_true: files('sifive_spi.c')) softmmu_ss.add(when: 'CONFIG_SSI', if_true: files('ssi.c')) softmmu_ss.add(when: 'CONFIG_STM32F2XX_SPI', if_true: files('stm32f2xx_spi.c')) softmmu_ss.add(when: 'CONFIG_XILINX_SPI', if_true: files('xilinx_spi.c')) |