diff options
| author | Cédric Le Goater <clg@kaod.org> | 2016-07-14 16:51:38 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-07-14 16:51:38 +0100 |
| commit | 2e1f05020b80677f66b14277b7b1e8d4bb175640 (patch) | |
| tree | 8c246431fa651af8613ae64835973835fa877eda /hw/ssi/aspeed_smc.c | |
| parent | 97c2ed5dbdda978e29618f356f11caa99a7df601 (diff) | |
ast2400: pretend DMAs are done for U-boot
U-boot does SPI timing calibration using DMA tranfers. To let the
initialization continue, we fake success by setting the DMA status of
the Interrupt Control Register.
For the moment, DMA support is not required as it is not used in
normal operation.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 1467994016-11678-4-git-send-email-clg@kaod.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ssi/aspeed_smc.c')
| -rw-r--r-- | hw/ssi/aspeed_smc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 854474b642..d319e04a27 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -273,6 +273,9 @@ static void aspeed_smc_reset(DeviceState *d) memset(s->regs, 0, sizeof s->regs); + /* Pretend DMA is done (u-boot initialization) */ + s->regs[R_INTR_CTRL] = INTR_CTRL_DMA_STATUS; + /* Unselect all slaves */ for (i = 0; i < s->num_cs; ++i) { s->regs[s->r_ctrl0 + i] |= CTRL_CE_STOP_ACTIVE; @@ -297,6 +300,7 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size) if (addr == s->r_conf || addr == s->r_timings || addr == s->r_ce_ctrl || + addr == R_INTR_CTRL || (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs)) { return s->regs[addr]; } else { |