diff options
| author | Igor Mammedov <imammedo@redhat.com> | 2020-02-19 11:09:45 -0500 |
|---|---|---|
| committer | Patchew Importer <importer@patchew.org> | 2020-02-19 16:50:01 +0000 |
| commit | 769e8d93bebfbe51817b915ef623944442ab3af3 (patch) | |
| tree | 3cc18ab05c6ee4bd5ae43eab071c3371c6a73708 /hw/sparc64 | |
| parent | b2554752b1da7c8fa8f16d5551743e66ccce0a67 (diff) | |
sparc/niagara: use memdev for RAM
memory_region_allocate_system_memory() API is going away, so
replace it with memdev allocated MemoryRegion. The later is
initialized by generic code, so board only needs to opt in
to memdev scheme by providing
MachineClass::default_ram_id
and using MachineState::ram instead of manually initializing
RAM memory region.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200219160953.13771-72-imammedo@redhat.com>
Diffstat (limited to 'hw/sparc64')
| -rw-r--r-- | hw/sparc64/niagara.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c index 5eb2d097b9..ab5ef8c5b3 100644 --- a/hw/sparc64/niagara.c +++ b/hw/sparc64/niagara.c @@ -40,7 +40,6 @@ typedef struct NiagaraBoardState { MemoryRegion hv_ram; - MemoryRegion partition_ram; MemoryRegion nvram; MemoryRegion md_rom; MemoryRegion hv_rom; @@ -111,11 +110,8 @@ static void niagara_init(MachineState *machine) NIAGARA_HV_RAM_SIZE, &error_fatal); memory_region_add_subregion(sysmem, NIAGARA_HV_RAM_BASE, &s->hv_ram); - memory_region_allocate_system_memory(&s->partition_ram, NULL, - "sun4v-partition.ram", - machine->ram_size); memory_region_add_subregion(sysmem, NIAGARA_PARTITION_RAM_BASE, - &s->partition_ram); + machine->ram); memory_region_init_ram(&s->nvram, NULL, "sun4v.nvram", NIAGARA_NVRAM_SIZE, &error_fatal); @@ -173,6 +169,7 @@ static void niagara_class_init(ObjectClass *oc, void *data) mc->max_cpus = 1; /* XXX for now */ mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1"); + mc->default_ram_id = "sun4v-partition.ram"; } static const TypeInfo niagara_type = { |