diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2018-06-25 09:42:10 -0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-07-02 15:41:14 +0200 |
| commit | 0a2e467bcebfed27bd0d1cd17992938e8a3fbb66 (patch) | |
| tree | 437e4ce2982c9073170feed9f6527ebe933e434f /hw/sparc64 | |
| parent | 4dab9c731cd930419bfec83207fcf725f8738804 (diff) | |
hw/sparc: Use the IEC binary prefix definitions
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-19-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/sparc64')
| -rw-r--r-- | hw/sparc64/niagara.c | 3 | ||||
| -rw-r--r-- | hw/sparc64/sun4u.c | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c index 22c4655fde..4fa8cb2904 100644 --- a/hw/sparc64/niagara.c +++ b/hw/sparc64/niagara.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "qemu-common.h" #include "cpu.h" #include "hw/hw.h" @@ -84,7 +85,7 @@ typedef struct NiagaraBoardState { #define NIAGARA_PROM_BASE 0xfff0000000ULL #define NIAGARA_Q_OFFSET 0x10000ULL #define NIAGARA_OBP_OFFSET 0x80000ULL -#define PROM_SIZE_MAX (4 * 1024 * 1024) +#define PROM_SIZE_MAX (4 * MiB) static void add_rom_or_fail(const char *file, const hwaddr addr) { diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 3975a7b65a..97d1269346 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "qemu/error-report.h" #include "qapi/error.h" #include "qemu-common.h" @@ -52,11 +53,10 @@ #include "hw/loader.h" #include "elf.h" #include "trace.h" -#include "qemu/cutils.h" #define KERNEL_LOAD_ADDR 0x00404000 #define CMDLINE_ADDR 0x003ff000 -#define PROM_SIZE_MAX (4 * 1024 * 1024) +#define PROM_SIZE_MAX (4 * MiB) #define PROM_VADDR 0x000ffd00000ULL #define PBM_SPECIAL_BASE 0x1fe00000000ULL #define PBM_MEM_BASE 0x1ff00000000ULL |