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authorAndreas Färber <afaerber@suse.de>2013-01-17 22:30:20 +0100
committerAndreas Färber <afaerber@suse.de>2013-03-12 10:35:55 +0100
commitd8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (patch)
tree57f8deccddd53e7aab5ca75d1d194da635a35790 /hw/sparc64
parent259186a7d2f7184efc96ae99bc5658e6159f53ad (diff)
exec: Pass CPUState to cpu_reset_interrupt()
Move it to qom/cpu.c to avoid build failures depending on include order of cpu-qom.h and exec/cpu-all.h. Change opaques of various ..._irq_handler() functions to the appropriate CPU type to facilitate using cpu_reset_interrupt(). Fix Coding Style issues while at it (missing braces, indentation). Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/sparc64')
-rw-r--r--hw/sparc64/sun4u.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index ae3c95b5cf..817c23cde3 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -276,7 +276,7 @@ void cpu_check_irqs(CPUSPARCState *env)
CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n",
env->interrupt_index);
env->interrupt_index = 0;
- cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
}
return;
}
@@ -309,7 +309,7 @@ void cpu_check_irqs(CPUSPARCState *env)
"current interrupt %x\n",
pil, env->pil_in, env->softint, env->interrupt_index);
env->interrupt_index = 0;
- cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
}
}
@@ -344,8 +344,9 @@ static void cpu_set_ivec_irq(void *opaque, int irq, int level)
} else {
if (env->ivec_status & 0x20) {
CPUIRQ_DPRINTF("Lower IVEC IRQ %d\n", irq);
+ cs = CPU(cpu);
env->ivec_status &= ~0x20;
- cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
}
}
}