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authorAndreas Färber <afaerber@suse.de>2013-01-17 18:51:17 +0100
committerAndreas Färber <afaerber@suse.de>2013-03-12 10:35:55 +0100
commit259186a7d2f7184efc96ae99bc5658e6159f53ad (patch)
tree7d49386c5725627dccbab0ee342520ee7437fc8d /hw/sparc/sun4m.c
parent21317bc222ef4cdca594b1856eea62f3dfbbfb6c (diff)
cpu: Move halted and interrupt_request fields to CPUState
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/sparc/sun4m.c')
-rw-r--r--hw/sparc/sun4m.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 37bd04108d..a7e6966435 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -256,10 +256,11 @@ void cpu_check_irqs(CPUSPARCState *env)
static void cpu_kick_irq(SPARCCPU *cpu)
{
CPUSPARCState *env = &cpu->env;
+ CPUState *cs = CPU(cpu);
- env->halted = 0;
+ cs->halted = 0;
cpu_check_irqs(env);
- qemu_cpu_kick(CPU(cpu));
+ qemu_cpu_kick(cs);
}
static void cpu_set_irq(void *opaque, int irq, int level)
@@ -285,19 +286,19 @@ static void dummy_cpu_set_irq(void *opaque, int irq, int level)
static void main_cpu_reset(void *opaque)
{
SPARCCPU *cpu = opaque;
- CPUSPARCState *env = &cpu->env;
+ CPUState *cs = CPU(cpu);
- cpu_reset(CPU(cpu));
- env->halted = 0;
+ cpu_reset(cs);
+ cs->halted = 0;
}
static void secondary_cpu_reset(void *opaque)
{
SPARCCPU *cpu = opaque;
- CPUSPARCState *env = &cpu->env;
+ CPUState *cs = CPU(cpu);
- cpu_reset(CPU(cpu));
- env->halted = 1;
+ cpu_reset(cs);
+ cs->halted = 1;
}
static void cpu_halt_signal(void *opaque, int irq, int level)
@@ -826,6 +827,7 @@ static const TypeInfo ram_info = {
static void cpu_devinit(const char *cpu_model, unsigned int id,
uint64_t prom_addr, qemu_irq **cpu_irqs)
{
+ CPUState *cs;
SPARCCPU *cpu;
CPUSPARCState *env;
@@ -841,7 +843,8 @@ static void cpu_devinit(const char *cpu_model, unsigned int id,
qemu_register_reset(main_cpu_reset, cpu);
} else {
qemu_register_reset(secondary_cpu_reset, cpu);
- env->halted = 1;
+ cs = CPU(cpu);
+ cs->halted = 1;
}
*cpu_irqs = qemu_allocate_irqs(cpu_set_irq, cpu, MAX_PILS);
env->prom_addr = prom_addr;