diff options
| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2012-08-07 16:10:32 +0000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2012-08-15 19:43:16 +0200 |
| commit | a307d59434ba78b97544b42b8cfd24a1b62e39a6 (patch) | |
| tree | 39e626860eed6c311b34770f9fadd9d4e6b5832e /hw/spapr_pci.h | |
| parent | c9f709d2e7d9dcc6e6ecbee8d499b4b14b11320b (diff) | |
pseries: Rework irq assignment to avoid carrying qemu_irqs around
Currently, the interfaces in the pseries machine code for assignment
and setup of interrupts pass around qemu_irq objects. That was done
in an attempt not to be too closely linked to the specific XICS
interrupt controller. However interactions with the device tree setup
made that attempt rather futile, and XICS is part of the PAPR spec
anyway, so this really just meant we had to carry both the qemu_irq
pointers and the XICS irq numbers around.
This mess will just get worse when we add upcoming PCI MSI support,
since that will require tracking a bunch more interrupt. Therefore,
this patch reworks the spapr code to just use XICS irq numbers
(roughly equivalent to GSIs on x86) and only retrieve the qemu_irq
pointers from the XICS code when we need them (a trivial lookup).
This is a reworked and generalized version of an earlier spapr_pci
specific patch from Alexey Kardashevskiy.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix checkpath warning]
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/spapr_pci.h')
| -rw-r--r-- | hw/spapr_pci.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/hw/spapr_pci.h b/hw/spapr_pci.h index dd66f4b386..6bba885600 100644 --- a/hw/spapr_pci.h +++ b/hw/spapr_pci.h @@ -40,13 +40,17 @@ typedef struct sPAPRPHBState { DMAContext *dma; struct { - uint32_t dt_irq; - qemu_irq qirq; + uint32_t irq; } lsi_table[PCI_NUM_PINS]; QLIST_ENTRY(sPAPRPHBState) list; } sPAPRPHBState; +static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin) +{ + return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq); +} + #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL #define SPAPR_PCI_IO_WIN_SIZE 0x10000 |