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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-03-21 18:05:23 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-03-21 18:05:23 +0000
commit2be17ebded1eb5add24674cc88e4833d5afaa980 (patch)
treed4c101f4d38c2c7e5678aa9834f192c933d4f150 /hw/slavio_misc.c
parentcf2be98437dc65eb1608b3dc0ec3aeefd88661ed (diff)
Wire up TC signal from Aux1 to FDC
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4096 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/slavio_misc.c')
-rw-r--r--hw/slavio_misc.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/hw/slavio_misc.c b/hw/slavio_misc.c
index 71128c267d..865e5ae8bb 100644
--- a/hw/slavio_misc.c
+++ b/hw/slavio_misc.c
@@ -51,6 +51,7 @@ typedef struct MiscState {
uint32_t sysctrl;
uint16_t leds;
CPUState *env;
+ qemu_irq fdc_tc;
} MiscState;
#define MISC_SIZE 1
@@ -66,6 +67,8 @@ typedef struct MiscState {
#define MISC_MDM 0x01b00000
#define MISC_SYS 0x01f00000
+#define AUX1_TC 0x02
+
#define AUX2_PWROFF 0x01
#define AUX2_PWRINTCLR 0x02
#define AUX2_PWRFAIL 0x20
@@ -175,6 +178,14 @@ static void slavio_aux1_mem_writeb(void *opaque, target_phys_addr_t addr,
MiscState *s = opaque;
MISC_DPRINTF("Write aux1 %2.2x\n", val & 0xff);
+ if (val & AUX1_TC) {
+ // Send a pulse to floppy terminal count line
+ if (s->fdc_tc) {
+ qemu_irq_raise(s->fdc_tc);
+ qemu_irq_lower(s->fdc_tc);
+ }
+ val &= ~AUX1_TC;
+ }
s->aux1 = val & 0xff;
}
@@ -407,7 +418,7 @@ static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)
void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
target_phys_addr_t aux1_base,
target_phys_addr_t aux2_base, qemu_irq irq,
- CPUState *env)
+ CPUState *env, qemu_irq **fdc_tc)
{
int io;
MiscState *s;
@@ -462,6 +473,7 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
s->irq = irq;
s->env = env;
+ *fdc_tc = &s->fdc_tc;
register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load,
s);