diff options
author | Andreas Färber <afaerber@suse.de> | 2012-11-20 16:15:47 +0100 |
---|---|---|
committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:54 +0100 |
commit | b350ab758342c764a6ead6ef064b15a72c830808 (patch) | |
tree | 8c741a55211c7ef96f732410f9ea4da4555a7567 /hw/sh4 | |
parent | c1b382e77d8693955d8838c19b33aeb214724f9b (diff) |
target-sh4: Move PVR/PRR/CVR into SuperHCPUClass
They are never changed once initialized, and moving them to the class
will allow to inspect them before instantiating.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/sh4')
-rw-r--r-- | hw/sh4/sh7750.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c index 6778c94f8e..e4d37ad6ac 100644 --- a/hw/sh4/sh7750.c +++ b/hw/sh4/sh7750.c @@ -255,6 +255,7 @@ static uint32_t sh7750_mem_readw(void *opaque, hwaddr addr) static uint32_t sh7750_mem_readl(void *opaque, hwaddr addr) { SH7750State *s = opaque; + SuperHCPUClass *scc; switch (addr) { case SH7750_BCR1_A7: @@ -288,11 +289,14 @@ static uint32_t sh7750_mem_readl(void *opaque, hwaddr addr) case SH7750_CCR_A7: return s->ccr; case 0x1f000030: /* Processor version */ - return s->cpu->pvr; + scc = SUPERH_CPU_GET_CLASS(s->cpu); + return scc->pvr; case 0x1f000040: /* Cache version */ - return s->cpu->cvr; + scc = SUPERH_CPU_GET_CLASS(s->cpu); + return scc->cvr; case 0x1f000044: /* Processor revision */ - return s->cpu->prr; + scc = SUPERH_CPU_GET_CLASS(s->cpu); + return scc->prr; default: error_access("long read", addr); abort(); |