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| author | Andreas Färber <afaerber@suse.de> | 2013-09-04 02:19:44 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2014-03-13 19:52:47 +0100 |
| commit | 00c8cb0a36f51a6866a83c08962d12a0eb21864b (patch) | |
| tree | 3fc05321f0f72aa3d7612efcce6b53ede066d909 /hw/sh4/sh7750.c | |
| parent | 31b030d4abc5bea89c2b33b39d3b302836f6b6ee (diff) | |
cputlb: Change tlb_flush() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/sh4/sh7750.c')
| -rw-r--r-- | hw/sh4/sh7750.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c index 1439ba44e5..4a39357529 100644 --- a/hw/sh4/sh7750.c +++ b/hw/sh4/sh7750.c @@ -416,7 +416,7 @@ static void sh7750_mem_writel(void *opaque, hwaddr addr, case SH7750_PTEH_A7: /* If asid changes, clear all registered tlb entries. */ if ((s->cpu->env.pteh & 0xff) != (mem_value & 0xff)) { - tlb_flush(&s->cpu->env, 1); + tlb_flush(CPU(s->cpu), 1); } s->cpu->env.pteh = mem_value; return; |