diff options
| author | Bin Meng <bin.meng@windriver.com> | 2020-09-01 09:39:02 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-09-09 15:54:18 -0700 |
| commit | c696e1f2b392af19653e82da26df3c61b85ab5a2 (patch) | |
| tree | 1fd7a96bbc40a5bf5aae06f7de551b684876c443 /hw/sd/meson.build | |
| parent | 8f2ac39d5d307589faca1d00d55a1a8054d53b0e (diff) | |
hw/sd: Add Cadence SDHCI emulation
Cadence SD/SDIO/eMMC Host Controller (SD4HC) is an SDHCI compatible
controller. The SDHCI compatible registers start from offset 0x200,
which are called Slot Register Set (SRS) in its datasheet.
This creates a Cadence SDHCI model built on top of the existing
generic SDHCI model. Cadence specific Host Register Set (HRS) is
implemented to make guest software happy.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-8-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/sd/meson.build')
| -rw-r--r-- | hw/sd/meson.build | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/sd/meson.build b/hw/sd/meson.build index b43e59bd00..9c29691e13 100644 --- a/hw/sd/meson.build +++ b/hw/sd/meson.build @@ -10,3 +10,4 @@ softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_mmci.c')) softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_sdhost.c')) softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_sdhci.c')) softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sdhost.c')) +softmmu_ss.add(when: 'CONFIG_CADENCE_SDHCI', if_true: files('cadence_sdhci.c')) |