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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2021-03-04 22:10:56 +0000
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2021-03-07 10:39:05 +0000
commit4e0ed62937d0498295457c2e1d8282a24ba140cb (patch)
tree5dd311c0ccc9c0982c69403b66def498dcbaeda5 /hw/scsi
parent4aaa6ac38393e6657869da528ad8c35657e23f84 (diff)
esp: raise interrupt after every non-DMA byte transferred to the FIFO
This matches the description in the datasheet and is required as support for non-DMA transfers is added. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210304221103.6369-36-mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'hw/scsi')
-rw-r--r--hw/scsi/esp.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index eb6681ca66..4ac299651f 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -760,6 +760,12 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
s->ti_size++;
s->ti_buf[s->ti_wptr++] = val & 0xff;
}
+
+ /* Non-DMA transfers raise an interrupt after every byte */
+ if (s->rregs[ESP_CMD] == CMD_TI) {
+ s->rregs[ESP_RINTR] |= INTR_FC | INTR_BS;
+ esp_raise_irq(s);
+ }
break;
case ESP_CMD:
s->rregs[saddr] = val;