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authorPeter Maydell <peter.maydell@linaro.org>2019-03-25 15:58:49 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-03-25 15:58:49 +0000
commit50ccc488b0d4c3b8e2790c18bcd7329fc609a1c6 (patch)
tree843306c6ffcdec524acfcdcad97a94a4d83367e8 /hw/scsi/trace-events
parentadb3321bfdeabeeb32b5ec545043a3f5f9fd8a7e (diff)
parentf2b2f53f6429b5abd7cd86bd65747f5f13e195eb (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190325' into staging
target-arm queue: * Fix non-parallel expansion of CASP * nrf51_gpio: reflect pull-up/pull-down to IRQs * Fix crash if guest tries to enable non-existent PMU counters * Add PMUv2 to the Cortex-A15 and Cortex-A7 * Make pmccntr_op_start/finish static # gpg: Signature made Mon 25 Mar 2019 14:19:47 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20190325: target/arm: make pmccntr_op_start/finish static target/arm: cortex-a7 and cortex-a15 have pmus target/arm: fix crash on pmu register access target/arm: add PCI_TESTDEV back to default config nrf51_gpio: reflect pull-up/pull-down to IRQs target/arm: Fix non-parallel expansion of CASP Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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