diff options
author | Paul Burton <paul.burton@imgtec.com> | 2013-06-14 08:30:45 +0100 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-07-28 19:59:22 +0200 |
commit | 02bccc7796fec8b39dca9affc8bff8edebe0a867 (patch) | |
tree | f49a334715be30e48149f569071410c9b4abca79 /hw/scsi/spapr_vscsi.c | |
parent | a427338b222b43197c2776cbc996936df0302f51 (diff) |
mips_malta: generate SPD EEPROM data at runtime
The SPD EEPROM specifies the amount of memory present in the system and
thus its correct contents can only be known at runtime. Calculating
parts of the data on init allows the data to accurately reflect the
amount of target memory present and allow YAMON to boot with an
arbitrary amount of SDRAM.
Where possible the SPD data will favor indicating 2 banks of SDRAM
rather than 1. For example the default 128MB of target memory will be
represented as 2x64MB banks rather than 1x128MB bank. This allows
versions of MIPS BIOS code (such as YAMON 2.22 and older) to boot
despite a bug preventing them from handling a single bank of SDRAM with
the Galileo GT64120 system controller emulated by QEMU.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/scsi/spapr_vscsi.c')
0 files changed, 0 insertions, 0 deletions