diff options
author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-05-20 07:45:09 +0200 |
---|---|---|
committer | Alistair Francis <alistair.francis@wdc.com> | 2023-06-13 17:18:54 +1000 |
commit | 8696b74a6fed86a9d2bd7e947d0490c2459a8aa6 (patch) | |
tree | c8a51b1a9944aade9fbf6772c120045ac3630eed /hw/riscv | |
parent | 264495f9486ac17ea0275b0de1510b5de32d142b (diff) |
hw/riscv/opentitan: Explicit machine type definition
Expand the DEFINE_MACHINE() macro, converting the class_init()
handler.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230520054510.68822-5-philmd@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r-- | hw/riscv/opentitan.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 7d7159ea30..9535308197 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -108,8 +108,10 @@ static void opentitan_machine_init(MachineState *machine) } } -static void opentitan_machine_class_init(MachineClass *mc) +static void opentitan_machine_class_init(ObjectClass *oc, void *data) { + MachineClass *mc = MACHINE_CLASS(oc); + mc->desc = "RISC-V Board compatible with OpenTitan"; mc->init = opentitan_machine_init; mc->max_cpus = 1; @@ -118,8 +120,6 @@ static void opentitan_machine_class_init(MachineClass *mc) mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size; } -DEFINE_MACHINE(TYPE_OPENTITAN_MACHINE, opentitan_machine_class_init) - static void lowrisc_ibex_soc_init(Object *obj) { LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj); @@ -327,6 +327,10 @@ static const TypeInfo open_titan_types[] = { .instance_size = sizeof(LowRISCIbexSoCState), .instance_init = lowrisc_ibex_soc_init, .class_init = lowrisc_ibex_soc_class_init, + }, { + .name = TYPE_OPENTITAN_MACHINE, + .parent = TYPE_MACHINE, + .class_init = opentitan_machine_class_init, } }; |