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authorAlistair Francis <alistair.francis@wdc.com>2020-04-23 14:07:27 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-06-19 08:24:07 -0700
commita7d2d98c5944cec9ac8ed12215c2ea9d4545779b (patch)
tree410abad03cb20a281a24c8009216d15f4e4ebb92 /hw/riscv
parent888c9af23ff0fced10a58041e6658e0eb60143cb (diff)
hw/char: Initial commit of Ibex UART
This is the initial commit of the Ibex UART device. Serial TX is working, while RX has been implemeneted but untested. This is based on the documentation from: https://docs.opentitan.org/hw/ip/uart/doc/ Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: LIU Zhiwei<zhiwei_liu@c-sky.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
index 94d19571f7..28947ef3e0 100644
--- a/hw/riscv/Kconfig
+++ b/hw/riscv/Kconfig
@@ -4,6 +4,9 @@ config HTIF
config HART
bool
+config IBEX
+ bool
+
config SIFIVE
bool
select MSI_NONBROKEN
@@ -29,6 +32,7 @@ config SPIKE
config OPENTITAN
bool
+ select IBEX
select HART
select UNIMP