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authorAlistair Francis <alistair.francis@wdc.com>2022-06-08 16:20:15 +1000
committerAlistair Francis <alistair@alistair23.me>2022-07-03 10:03:20 +1000
commitec2c62dacc186893a6ce63089f96b1906dd68804 (patch)
tree32e88549c733e3cc0a2d33c82714256298f20805 /hw/riscv
parent188000952ca002402e41efe0a0d333097024dd90 (diff)
hw/riscv: boot: Reduce FDT address alignment constraints
We previously stored the device tree at a 16MB alignment from the end of memory (or 3GB). This means we need at least 16MB of memory to be able to do this. We don't actually need the FDT to be 16MB aligned, so let's drop it down to 2MB so that we can support systems with less memory, while also allowing FDT size expansion. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/992 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Message-Id: <20220608062015.317894-1-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/boot.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 2d80f40b31..06b4fc5ac3 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -227,11 +227,11 @@ uint64_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt)
/*
* We should put fdt as far as possible to avoid kernel/initrd overwriting
* its content. But it should be addressable by 32 bit system as well.
- * Thus, put it at an 16MB aligned address that less than fdt size from the
+ * Thus, put it at an 2MB aligned address that less than fdt size from the
* end of dram or 3GB whichever is lesser.
*/
temp = (dram_base < 3072 * MiB) ? MIN(dram_end, 3072 * MiB) : dram_end;
- fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 16 * MiB);
+ fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);
ret = fdt_pack(fdt);
/* Should only fail if we've built a corrupted tree */