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authorAlistair Francis <alistair.francis@wdc.com>2019-11-06 16:47:20 -0800
committerPalmer Dabbelt <palmer@dabbelt.com>2019-11-14 09:53:28 -0800
commit6911fde41006b2afe3510755c4cff259ca56c1d9 (patch)
treea74b8726dcf672259e20d3594504fae18219b430 /hw/riscv
parent3158add2bd12b5db812b8362bebbaba1e9d4d265 (diff)
riscv/virt: Increase flash size
Coreboot developers have requested that they have at least 32MB of flash to load binaries. We currently have 32MB of flash, but it is split in two to allow loading two flash binaries. Let's increase the flash size from 32MB to 64MB to ensure we have a single region that is 32MB. No QEMU release has include flash in the RISC-V virt machine, so this isn't a breaking change. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/virt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index cc8f311e6b..23f340df19 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -62,7 +62,7 @@ static const struct MemmapEntry {
[VIRT_PLIC] = { 0xc000000, 0x4000000 },
[VIRT_UART0] = { 0x10000000, 0x100 },
[VIRT_VIRTIO] = { 0x10001000, 0x1000 },
- [VIRT_FLASH] = { 0x20000000, 0x2000000 },
+ [VIRT_FLASH] = { 0x20000000, 0x4000000 },
[VIRT_DRAM] = { 0x80000000, 0x0 },
[VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 },
[VIRT_PCIE_PIO] = { 0x03000000, 0x00010000 },