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authorAnup Patel <Anup.Patel@wdc.com>2019-11-06 11:56:43 +0000
committerPalmer Dabbelt <palmerdabbelt@google.com>2020-02-10 12:01:38 -0800
commit67b5ef30492b11c2a0f061b47773e45d87109a17 (patch)
tree77651210ee0ad39f41b4108765b1b30daf6f1c1f /hw/riscv
parent9a5b40b84279d60c0d93e5bb174fc9b49f901c91 (diff)
riscv: virt: Use Goldfish RTC device
We extend QEMU RISC-V virt machine by adding Goldfish RTC device to it. This will allow Guest Linux to sync it's local date/time with Host date/time via RTC device. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/Kconfig1
-rw-r--r--hw/riscv/virt.c16
2 files changed, 17 insertions, 0 deletions
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
index b12660b9f8..ff9fbe958a 100644
--- a/hw/riscv/Kconfig
+++ b/hw/riscv/Kconfig
@@ -34,6 +34,7 @@ config RISCV_VIRT
select PCI
select HART
select SERIAL
+ select GOLDFISH_RTC
select VIRTIO_MMIO
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 6d682f8a78..7f9e1e5176 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -58,6 +58,7 @@ static const struct MemmapEntry {
[VIRT_DEBUG] = { 0x0, 0x100 },
[VIRT_MROM] = { 0x1000, 0x11000 },
[VIRT_TEST] = { 0x100000, 0x1000 },
+ [VIRT_RTC] = { 0x101000, 0x1000 },
[VIRT_CLINT] = { 0x2000000, 0x10000 },
[VIRT_PLIC] = { 0xc000000, 0x4000000 },
[VIRT_UART0] = { 0x10000000, 0x100 },
@@ -404,6 +405,18 @@ static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
}
g_free(nodename);
+ nodename = g_strdup_printf("/rtc@%lx",
+ (long)memmap[VIRT_RTC].base);
+ qemu_fdt_add_subnode(fdt, nodename);
+ qemu_fdt_setprop_string(fdt, nodename, "compatible",
+ "google,goldfish-rtc");
+ qemu_fdt_setprop_cells(fdt, nodename, "reg",
+ 0x0, memmap[VIRT_RTC].base,
+ 0x0, memmap[VIRT_RTC].size);
+ qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
+ qemu_fdt_setprop_cell(fdt, nodename, "interrupts", RTC_IRQ);
+ g_free(nodename);
+
nodename = g_strdup_printf("/flash@%" PRIx64, flashbase);
qemu_fdt_add_subnode(s->fdt, nodename);
qemu_fdt_setprop_string(s->fdt, nodename, "compatible", "cfi-flash");
@@ -601,6 +614,9 @@ static void riscv_virt_board_init(MachineState *machine)
0, qdev_get_gpio_in(DEVICE(s->plic), UART0_IRQ), 399193,
serial_hd(0), DEVICE_LITTLE_ENDIAN);
+ sysbus_create_simple("goldfish_rtc", memmap[VIRT_RTC].base,
+ qdev_get_gpio_in(DEVICE(s->plic), RTC_IRQ));
+
virt_flash_create(s);
for (i = 0; i < ARRAY_SIZE(s->flash); i++) {