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authorMichael Clark <mjc@sifive.com>2018-03-05 20:22:30 +1300
committerMichael Clark <mjc@sifive.com>2018-05-06 10:39:38 +1200
commit89854803ce3efb16fbc94604e652f152f5102569 (patch)
tree8c517efe0a2718ff6ce514d167e2205b8d8a7cfa /hw/riscv/spike.c
parent5b5583806b16ca9ddc454e2a5892b1fea575e470 (diff)
RISC-V: Remove EM_RISCV ELF_MACHINE indirection
Pointless indirection. Other ports use EM_ constants directly. Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/spike.c')
-rw-r--r--hw/riscv/spike.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 44eab94e17..9e18c618bf 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -64,7 +64,7 @@ static uint64_t load_kernel(const char *kernel_filename)
uint64_t kernel_entry, kernel_high;
if (load_elf_ram_sym(kernel_filename, NULL, NULL,
- &kernel_entry, NULL, &kernel_high, 0, ELF_MACHINE, 1, 0,
+ &kernel_entry, NULL, &kernel_high, 0, EM_RISCV, 1, 0,
NULL, true, htif_symbol_callback) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
exit(1);