diff options
| author | Bin Meng <bin.meng@windriver.com> | 2020-09-03 18:40:16 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-09-09 15:54:19 -0700 |
| commit | 406fafd5d0f9a1c6a365ff1733c26a043b1c4877 (patch) | |
| tree | ee4ed77217e62a3d3a8c185e8eda59ff2a138c35 /hw/riscv/sifive_e.c | |
| parent | 4921a0ce86cecd03e6918832673db79de62e6fe1 (diff) | |
hw/riscv: Move sifive_clint model to hw/intc
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_clint model to hw/intc directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-6-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/sifive_e.c')
| -rw-r--r-- | hw/riscv/sifive_e.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 7f43ed953a..3bdb16e697 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -40,10 +40,10 @@ #include "target/riscv/cpu.h" #include "hw/riscv/riscv_hart.h" #include "hw/riscv/sifive_plic.h" -#include "hw/riscv/sifive_clint.h" #include "hw/riscv/sifive_uart.h" #include "hw/riscv/sifive_e.h" #include "hw/riscv/boot.h" +#include "hw/intc/sifive_clint.h" #include "hw/misc/sifive_e_prci.h" #include "chardev/char.h" #include "sysemu/arch_init.h" |