diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2018-05-22 09:43:58 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-05-22 09:43:58 +0100 |
| commit | 4f50c1673a89b07f376ce5c42d22d79a79cd466d (patch) | |
| tree | fe9b1ed0a578fa013bbe1aa3efb02ac7c7fe87af /hw/riscv/sifive_clint.c | |
| parent | 9802316ed6c19fd45b4c498523df02ca370d0586 (diff) | |
| parent | 403503b162ffc33fb64cfefdf7b880acf41772cd (diff) | |
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging
Speculative store buffer bypass mitigation (CVE-2018-3639)
# gpg: Signature made Mon 21 May 2018 23:00:46 BST
# gpg: using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/x86-next-pull-request:
i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639)
i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639)
i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/riscv/sifive_clint.c')
0 files changed, 0 insertions, 0 deletions