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authorAlistair Francis <alistair.francis@wdc.com>2020-04-23 11:30:50 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-06-03 09:11:51 -0700
commitfe0fe4735e798578097758781166cc221319b93d (patch)
treec0eaed6519b02f036f32535a9d3aa66f561c148f /hw/riscv/Kconfig
parent36b80ad99f7ea4979a4c5fc6e4072619b405e3b0 (diff)
riscv: Initial commit of OpenTitan machine
This adds a barebone OpenTitan machine to QEMU. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
Diffstat (limited to 'hw/riscv/Kconfig')
-rw-r--r--hw/riscv/Kconfig5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
index ff9fbe958a..94d19571f7 100644
--- a/hw/riscv/Kconfig
+++ b/hw/riscv/Kconfig
@@ -27,6 +27,11 @@ config SPIKE
select HTIF
select SIFIVE
+config OPENTITAN
+ bool
+ select HART
+ select UNIMP
+
config RISCV_VIRT
bool
imply PCI_DEVICES