diff options
| author | Mark Langsdorf <mark.langsdorf@calxeda.com> | 2012-01-17 10:54:07 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-01-17 10:54:07 +0000 |
| commit | a32134aad891bd7b6cfa72b8f5ae2290bbe6fdda (patch) | |
| tree | a6dce78dfb6c6e0d866df3b94ea0ac9f5f8e46eb /hw/realview_gic.c | |
| parent | b09da0c335204322ba7a806f63180984df4db6f3 (diff) | |
arm: make the number of GIC interrupts configurable
Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
and create a configurable property for each defaulting to 96 and 64
(respectively) so that device modelers can set the value appropriately
for their SoC. Other ARM processors also set their maximum number of
used IRQs appropriately.
Set the maximum theoretical number of GIC interrupts to 1020 and
update the save/restore code to only use the appropriate number for
each SoC.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
[Peter Maydell: fixed minor whitespace snafu]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/realview_gic.c')
| -rw-r--r-- | hw/realview_gic.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/hw/realview_gic.c b/hw/realview_gic.c index 8c4d509ee7..7342edef69 100644 --- a/hw/realview_gic.c +++ b/hw/realview_gic.c @@ -9,7 +9,6 @@ #include "sysbus.h" -#define GIC_NIRQ 96 #define NCPU 1 /* Only a single "CPU" interface is present. */ @@ -37,7 +36,11 @@ static int realview_gic_init(SysBusDevice *dev) { RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev); - gic_init(&s->gic); + /* The GICs on the RealView boards have a fixed nonconfigurable + * number of interrupt lines, so we don't need to expose this as + * a qdev property. + */ + gic_init(&s->gic, 96); realview_gic_map_setup(s); sysbus_init_mmio(dev, &s->container); return 0; |