diff options
author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-23 21:47:51 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-23 21:47:51 +0000 |
commit | 3f582262e5443ded25ba6c8f016a114279a3b59f (patch) | |
tree | 5604a51f782ca8d8062ee175db5a07a772d095df /hw/pxa2xx_timer.c | |
parent | 209a4e691d230b01cf44c9f954a34db04d5708be (diff) |
Implement the PXA2xx I2C master controller.
Fix PXA270-specific timers and make minor changes in other PXA parts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2853 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/pxa2xx_timer.c')
-rw-r--r-- | hw/pxa2xx_timer.c | 22 |
1 files changed, 9 insertions, 13 deletions
diff --git a/hw/pxa2xx_timer.c b/hw/pxa2xx_timer.c index fe55ce0bd1..073806a645 100644 --- a/hw/pxa2xx_timer.c +++ b/hw/pxa2xx_timer.c @@ -75,7 +75,7 @@ struct pxa2xx_timer4_s { }; typedef struct { - uint32_t base; + target_phys_addr_t base; int32_t clock; int32_t oldclock; uint64_t lastload; @@ -85,8 +85,6 @@ typedef struct { uint32_t events; uint32_t irq_enabled; uint32_t reset3; - CPUState *cpustate; - int64_t qemu_ticks; uint32_t snapshot; } pxa2xx_timer_info; @@ -121,7 +119,7 @@ static void pxa2xx_timer_update4(void *opaque, uint64_t now_qemu, int n) counter = counters[n]; if (!s->tm4[counter].freq) { - qemu_del_timer(s->timer[n].qtimer); + qemu_del_timer(s->tm4[n].tm.qtimer); return; } @@ -131,7 +129,7 @@ static void pxa2xx_timer_update4(void *opaque, uint64_t now_qemu, int n) new_qemu = now_qemu + muldiv64((uint32_t) (s->tm4[n].tm.value - now_vm), ticks_per_sec, s->tm4[counter].freq); - qemu_mod_timer(s->timer[n].qtimer, new_qemu); + qemu_mod_timer(s->tm4[n].tm.qtimer, new_qemu); } static uint32_t pxa2xx_timer_read(void *opaque, target_phys_addr_t offset) @@ -350,7 +348,7 @@ static void pxa2xx_timer_tick(void *opaque) if (t->num == 3) if (i->reset3 & 1) { i->reset3 = 0; - cpu_reset(i->cpustate); + qemu_system_reset_request(); } } @@ -367,7 +365,7 @@ static void pxa2xx_timer_tick4(void *opaque) } static pxa2xx_timer_info *pxa2xx_timer_init(target_phys_addr_t base, - qemu_irq *irqs, CPUState *cpustate) + qemu_irq *irqs) { int i; int iomemtype; @@ -380,7 +378,6 @@ static pxa2xx_timer_info *pxa2xx_timer_init(target_phys_addr_t base, s->clock = 0; s->lastload = qemu_get_clock(vm_clock); s->reset3 = 0; - s->cpustate = cpustate; for (i = 0; i < 4; i ++) { s->timer[i].value = 0; @@ -398,18 +395,17 @@ static pxa2xx_timer_info *pxa2xx_timer_init(target_phys_addr_t base, return s; } -void pxa25x_timer_init(target_phys_addr_t base, - qemu_irq *irqs, CPUState *cpustate) +void pxa25x_timer_init(target_phys_addr_t base, qemu_irq *irqs) { - pxa2xx_timer_info *s = pxa2xx_timer_init(base, irqs, cpustate); + pxa2xx_timer_info *s = pxa2xx_timer_init(base, irqs); s->freq = PXA25X_FREQ; s->tm4 = 0; } void pxa27x_timer_init(target_phys_addr_t base, - qemu_irq *irqs, qemu_irq irq4, CPUState *cpustate) + qemu_irq *irqs, qemu_irq irq4) { - pxa2xx_timer_info *s = pxa2xx_timer_init(base, irqs, cpustate); + pxa2xx_timer_info *s = pxa2xx_timer_init(base, irqs); int i; s->freq = PXA27X_FREQ; s->tm4 = (struct pxa2xx_timer4_s *) qemu_mallocz(8 * |