diff options
author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-01 18:59:50 +0000 |
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committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-01 18:59:50 +0000 |
commit | 8da3ff180974732fc4272cb4433fef85c1822961 (patch) | |
tree | f23cfaffa61efb36aa46dfeb771ad33cbfd4f3aa /hw/pxa2xx_pic.c | |
parent | 6ad1d22b15c0a091edb1d8efc983c1d75f74ef45 (diff) |
Change MMIO callbacks to use offsets, not absolute addresses.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/pxa2xx_pic.c')
-rw-r--r-- | hw/pxa2xx_pic.c | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c index a3611b88ba..e8a601dbb7 100644 --- a/hw/pxa2xx_pic.c +++ b/hw/pxa2xx_pic.c @@ -31,7 +31,6 @@ #define PXA2XX_PIC_SRCS 40 struct pxa2xx_pic_state_s { - target_phys_addr_t base; CPUState *cpu_env; uint32_t int_enabled[2]; uint32_t int_pending[2]; @@ -117,7 +116,6 @@ static inline uint32_t pxa2xx_pic_highest(struct pxa2xx_pic_state_s *s) { static uint32_t pxa2xx_pic_mem_read(void *opaque, target_phys_addr_t offset) { struct pxa2xx_pic_state_s *s = (struct pxa2xx_pic_state_s *) opaque; - offset -= s->base; switch (offset) { case ICIP: /* IRQ Pending register */ @@ -158,7 +156,6 @@ static void pxa2xx_pic_mem_write(void *opaque, target_phys_addr_t offset, uint32_t value) { struct pxa2xx_pic_state_s *s = (struct pxa2xx_pic_state_s *) opaque; - offset -= s->base; switch (offset) { case ICMR: /* Mask register */ @@ -207,7 +204,6 @@ static const int pxa2xx_cp_reg_map[0x10] = { static uint32_t pxa2xx_pic_cp_read(void *opaque, int op2, int reg, int crm) { - struct pxa2xx_pic_state_s *s = (struct pxa2xx_pic_state_s *) opaque; target_phys_addr_t offset; if (pxa2xx_cp_reg_map[reg] == -1) { @@ -215,14 +211,13 @@ static uint32_t pxa2xx_pic_cp_read(void *opaque, int op2, int reg, int crm) return 0; } - offset = s->base + pxa2xx_cp_reg_map[reg]; + offset = pxa2xx_cp_reg_map[reg]; return pxa2xx_pic_mem_read(opaque, offset); } static void pxa2xx_pic_cp_write(void *opaque, int op2, int reg, int crm, uint32_t value) { - struct pxa2xx_pic_state_s *s = (struct pxa2xx_pic_state_s *) opaque; target_phys_addr_t offset; if (pxa2xx_cp_reg_map[reg] == -1) { @@ -230,7 +225,7 @@ static void pxa2xx_pic_cp_write(void *opaque, int op2, int reg, int crm, return; } - offset = s->base + pxa2xx_cp_reg_map[reg]; + offset = pxa2xx_cp_reg_map[reg]; pxa2xx_pic_mem_write(opaque, offset, value); } @@ -293,7 +288,6 @@ qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env) return NULL; s->cpu_env = env; - s->base = base; s->int_pending[0] = 0; s->int_pending[1] = 0; |