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authorIsaku Yamahata <yamahata@valinux.co.jp>2009-10-30 21:21:07 +0900
committerAnthony Liguori <aliguori@us.ibm.com>2009-11-09 08:43:08 -0600
commita455783bb6ecede44450f54980c42951fd06b7fb (patch)
tree7c7b95b96400315efc8fe46a3455cbae9c045fbb /hw/ppce500_pci.c
parent4f5e19e6c570459cd524b29b24374f03860f5149 (diff)
pci_host: consolidate pci config address access.
consolidate pci_config address access into pci_host.c Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/ppce500_pci.c')
-rw-r--r--hw/ppce500_pci.c34
1 files changed, 1 insertions, 33 deletions
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 7c8cdada4f..223de3ae34 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -84,37 +84,6 @@ struct PPCE500PCIState {
typedef struct PPCE500PCIState PPCE500PCIState;
-static uint32_t pcie500_cfgaddr_readl(void *opaque, target_phys_addr_t addr)
-{
- PPCE500PCIState *pci = opaque;
-
- pci_debug("%s: (addr:" TARGET_FMT_plx ") -> value:%x\n", __func__, addr,
- pci->pci_state.config_reg);
- return pci->pci_state.config_reg;
-}
-
-static CPUReadMemoryFunc * const pcie500_cfgaddr_read[] = {
- &pcie500_cfgaddr_readl,
- &pcie500_cfgaddr_readl,
- &pcie500_cfgaddr_readl,
-};
-
-static void pcie500_cfgaddr_writel(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- PPCE500PCIState *controller = opaque;
-
- pci_debug("%s: value:%x -> (addr:" TARGET_FMT_plx ")\n", __func__, value,
- addr);
- controller->pci_state.config_reg = value & ~0x3;
-}
-
-static CPUWriteMemoryFunc * const pcie500_cfgaddr_write[] = {
- &pcie500_cfgaddr_writel,
- &pcie500_cfgaddr_writel,
- &pcie500_cfgaddr_writel,
-};
-
static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr)
{
PPCE500PCIState *pci = opaque;
@@ -324,8 +293,7 @@ PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
controller->pci_dev = d;
/* CFGADDR */
- index = cpu_register_io_memory(pcie500_cfgaddr_read,
- pcie500_cfgaddr_write, controller);
+ index = pci_host_config_register_io_memory_noswap(&controller->pci_state);
if (index < 0)
goto free;
cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index);