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authorAndreas Färber <andreas.faerber@web.de>2013-01-10 21:52:28 +0100
committerAndreas Färber <andreas.faerber@web.de>2013-01-10 21:52:28 +0100
commit63e3555e80c31776285accbb4d0c14ae91c457dc (patch)
tree89907c82724d6519c8bbad7acc15c0198c6f902f /hw/ppc_mac.h
parent52a71bff6085398fbb8602718af228cd6339c02d (diff)
parenta6308bc2224db238e72c570482717b68246a7ce0 (diff)
Merge branch 'master' of git://git.qemu.org/qemu into prep-up
Conflicts: hw/Makefile.objs hw/ppc_prep.c Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Diffstat (limited to 'hw/ppc_mac.h')
-rw-r--r--hw/ppc_mac.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/ppc_mac.h b/hw/ppc_mac.h
index af75e45cc2..89c7d66386 100644
--- a/hw/ppc_mac.h
+++ b/hw/ppc_mac.h
@@ -25,7 +25,7 @@
#if !defined(__PPC_MAC_H__)
#define __PPC_MAC_H__
-#include "memory.h"
+#include "exec/memory.h"
/* SMP is not enabled, for now */
#define MAX_CPUS 1
@@ -55,6 +55,7 @@ qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
int nb_cpus, qemu_irq **irqs);
/* Grackle PCI */
+#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io);
@@ -70,10 +71,10 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
/* Mac NVRAM */
typedef struct MacIONVRAMState MacIONVRAMState;
-MacIONVRAMState *macio_nvram_init (target_phys_addr_t size,
+MacIONVRAMState *macio_nvram_init (hwaddr size,
unsigned int it_shift);
void macio_nvram_setup_bar(MacIONVRAMState *s, MemoryRegion *bar,
- target_phys_addr_t mem_base);
+ hwaddr mem_base);
void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
uint32_t macio_nvram_read (void *opaque, uint32_t addr);
void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);