diff options
| author | Cédric Le Goater <clg@kaod.org> | 2017-12-22 10:55:51 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-01-10 12:53:00 +1100 |
| commit | a6a444a87aae0062ffed45374b93217ff3308a8c (patch) | |
| tree | 16999bd8c355a15dd4273cb37d2270275cdf6ee2 /hw/ppc | |
| parent | b168a138a8bc9c18e8140fef614a6b66721497fb (diff) | |
target/ppc: more use of the PPC_*() macros
Also introduce utilities to manipulate bitmasks (originaly from OPAL)
which be will be used in the model of the XIVE interrupt controller.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc')
| -rw-r--r-- | hw/ppc/pnv_lpc.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index b777b78e18..c42b4a8f6c 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -146,13 +146,13 @@ static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data, return success; } -#define ECCB_CTL_READ (1ull << (63 - 15)) +#define ECCB_CTL_READ PPC_BIT(15) #define ECCB_CTL_SZ_LSH (63 - 7) -#define ECCB_CTL_SZ_MASK (0xfull << ECCB_CTL_SZ_LSH) -#define ECCB_CTL_ADDR_MASK 0xffffffffu; +#define ECCB_CTL_SZ_MASK PPC_BITMASK(4, 7) +#define ECCB_CTL_ADDR_MASK PPC_BITMASK(32, 63) -#define ECCB_STAT_OP_DONE (1ull << (63 - 52)) -#define ECCB_STAT_OP_ERR (1ull << (63 - 52)) +#define ECCB_STAT_OP_DONE PPC_BIT(52) +#define ECCB_STAT_OP_ERR PPC_BIT(52) #define ECCB_STAT_RD_DATA_LSH (63 - 37) #define ECCB_STAT_RD_DATA_MASK (0xffffffff << ECCB_STAT_RD_DATA_LSH) |