diff options
| author | Paolo Bonzini <pbonzini@redhat.com> | 2020-02-25 13:41:48 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-02-25 13:41:48 +0100 |
| commit | 9e264985ff0bc86927b44b334bd504687f78659d (patch) | |
| tree | 0e0cf83ea14b7cd84f255eedb15ffbf4c395d1ed /hw/ppc | |
| parent | ca6155c0f2bd39b4b4162533be401c98bd960820 (diff) | |
| parent | adeefe01671fb06a930beba624dc3db8367901a3 (diff) | |
Merge branch 'exec_rw_const_v4' of https://github.com/philmd/qemu into HEAD
Diffstat (limited to 'hw/ppc')
| -rw-r--r-- | hw/ppc/pnv_lpc.c | 8 | ||||
| -rw-r--r-- | hw/ppc/ppc440_uc.c | 6 | ||||
| -rw-r--r-- | hw/ppc/spapr_hcall.c | 4 |
3 files changed, 10 insertions, 8 deletions
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index 5989d723c5..f150deca34 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -238,16 +238,16 @@ static bool opb_read(PnvLpcController *lpc, uint32_t addr, uint8_t *data, int sz) { /* XXX Handle access size limits and FW read caching here */ - return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, - data, sz, false); + return !address_space_read(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, + data, sz); } static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data, int sz) { /* XXX Handle access size limits here */ - return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, - data, sz, true); + return !address_space_write(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, + data, sz); } #define ECCB_CTL_READ PPC_BIT(15) diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 1a6a8fac22..d5ea962249 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -909,8 +909,10 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val) sidx = didx = 0; width = 1 << ((val & DMA0_CR_PW) >> 25); - rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen, 0); - wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, 1); + rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen, + false); + wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, + true); if (rptr && wptr) { if (!(val & DMA0_CR_DEC) && val & DMA0_CR_SAI && val & DMA0_CR_DAI) { diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 6db3dbde9c..934eb12d27 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -832,7 +832,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr, if (!is_ram_address(spapr, dst) || (dst & ~TARGET_PAGE_MASK) != 0) { return H_PARAMETER; } - pdst = cpu_physical_memory_map(dst, &len, 1); + pdst = cpu_physical_memory_map(dst, &len, true); if (!pdst || len != TARGET_PAGE_SIZE) { return H_PARAMETER; } @@ -843,7 +843,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr, ret = H_PARAMETER; goto unmap_out; } - psrc = cpu_physical_memory_map(src, &len, 0); + psrc = cpu_physical_memory_map(src, &len, false); if (!psrc || len != TARGET_PAGE_SIZE) { ret = H_PARAMETER; goto unmap_out; |