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| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-12-05 07:15:20 +0400 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-12-08 18:48:26 +0000 |
| commit | fcc803d119a4c01a9b0ee5bda35fda1eeabffa33 (patch) | |
| tree | bbd6697bd198b45b2322e5b43d3ab5159e093d98 /hw/ppc4xx_devs.c | |
| parent | 536b558f5896ebbd635b57fa393e82faaa32ad52 (diff) | |
target-xtensa: implement ATOMCTL SR
ATOMCTL SR controls s32c1i opcode behavior depending on targeted memory
type. See ISA, 4.3.12.4 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/ppc4xx_devs.c')
0 files changed, 0 insertions, 0 deletions