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authorDavid Gibson <david@gibson.dropbear.id.au>2012-04-25 17:55:42 +0000
committerAlexander Graf <agraf@suse.de>2012-05-01 21:47:00 +0200
commit7fb0bd3473dfb2bb1768072ebbfa5771e8c8af4a (patch)
tree6e6c8ed3865a0208b3abb277b610ed4d101f41d2 /hw/ppc405_uc.c
parentd601fac478eee7391f3e7005a9321fbf38d74809 (diff)
pseries: Use the same interrupt swizzling for host bridges as p2p bridges
Currently the pseries PCI code uses a somewhat strange scheme of PCI irq allocation - one per slot up to a maximum that's greater than the usual 4. This scheme more or less worked, because we were able to tell the guest the irq mapping in the device tree, however it's a bit odd and may break assumptions in the future. Worse, the array used to construct the dev tree interrupt map was mis-sized, we got away with it only because it happened that our SPAPR_PCI_NUM_LSI value was greater than 7. This patch changes the pseries PCI code to use the same interrupt swizzling scheme as is standardized for PCI to PCI bridges. This makes for better consistency, deals better with any devices which use multiple interrupt pins and will make life easier in the future when we add passthrough of what may be either a host bridge or a PCI to PCI bridge. This won't break existing guests, because they don't assume a particular mapping scheme for host bridges, but just follow what we tell them in the device tree (also updated to match, of course). This patch also fixes the allocation of the irq map. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
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