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authorStefan Hajnoczi <stefanha@redhat.com>2017-05-30 09:44:54 +0100
committerStefan Hajnoczi <stefanha@redhat.com>2017-05-30 09:44:58 +0100
commit5bb0d22cb41a366efff662d45bec26ab343b5532 (patch)
treeb3c25050d636feebef9727f172d137e08ff0555e /hw/ppc/spapr_hcall.c
parentd0eda02938054268751c6c7bf00219f695b0ca8b (diff)
parent62f94fc94f98095173146e753a1f03d7c2cc7ba3 (diff)
Merge remote-tracking branch 'dgibson/tags/ppc-for-2.10-20170525' into staging
ppc patch queue 2017-05-25 Assorted accumulated patches. These are nearly all bugfixes at one level or another - some for longstanding problems, others for some regressions caused by more recent cleanups. This includes preliminary patches towards fixing migration for Radix Page Table guests under POWER9 and also fixing some migration regressions due to the re-organization of the interrupt controller code. Not all the pieces are there yet, so those still won't quite work, but the preliminary changes make sense on their own. # gpg: Signature made Thu 25 May 2017 04:50:00 AM BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * dgibson/tags/ppc-for-2.10-20170525: xics: add unrealize handler hw/ppc/spapr.c: recover pending LMB unplug info in spapr_lmb_release hw/ppc: migrating the DRC state of hotplugged devices hw/ppc: removing drc->detach_cb and drc->detach_cb_opaque hw/ppc/spapr.c: adding pending_dimm_unplugs to sPAPRMachineState spapr: add pre_plug function for memory pseries: Restore support for total vcpus not a multiple of threads-per-core for old machine types pseries: Split CAS PVR negotiation out into a separate function spapr: fix error reporting in xics_system_init() spapr_cpu_core: drop reference on ICP object during CPU realization hw/ppc/spapr_events.c: removing 'exception' from sPAPREventLogEntry spapr: ensure core_slot isn't NULL in spapr_core_unplug() xics_kvm: cache already enabled vCPU ids spapr: Consolidate HPT freeing code into a routine spapr-cpu-core: release ICP object when realization fails spapr: sanitize error handling in spapr_ics_create() ppc/xics: simplify prototype of xics_spapr_init() target/ppc: reset reservation in do_rfi() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/ppc/spapr_hcall.c')
-rw-r--r--hw/ppc/spapr_hcall.c54
1 files changed, 33 insertions, 21 deletions
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 49a83ee77e..aae5a62a61 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -913,10 +913,7 @@ static void spapr_check_setup_free_hpt(sPAPRMachineState *spapr,
/* We assume RADIX, so this catches all the "Do Nothing" cases */
} else if (!(patbe_old & PATBE1_GR)) {
/* HASH->RADIX : Free HPT */
- g_free(spapr->htab);
- spapr->htab = NULL;
- spapr->htab_shift = 0;
- close_htab_fd(spapr);
+ spapr_free_hpt(spapr);
} else if (!(patbe_new & PATBE1_GR)) {
/* RADIX->HASH || NOTHING->HASH : Allocate HPT */
spapr_setup_hpt_and_vrma(spapr);
@@ -1047,19 +1044,13 @@ static target_ulong h_signal_sys_reset(PowerPCCPU *cpu,
}
}
-static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
- sPAPRMachineState *spapr,
- target_ulong opcode,
- target_ulong *args)
+static uint32_t cas_check_pvr(PowerPCCPU *cpu, target_ulong *addr,
+ Error **errp)
{
- target_ulong list = ppc64_phys_to_real(args[0]);
- target_ulong ov_table;
bool explicit_match = false; /* Matched the CPU's real PVR */
uint32_t max_compat = cpu->max_compat;
uint32_t best_compat = 0;
int i;
- sPAPROptionVector *ov1_guest, *ov5_guest, *ov5_cas_old, *ov5_updates;
- bool guest_radix;
/*
* We scan the supplied table of PVRs looking for two things
@@ -1069,9 +1060,9 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
for (i = 0; i < 512; ++i) {
uint32_t pvr, pvr_mask;
- pvr_mask = ldl_be_phys(&address_space_memory, list);
- pvr = ldl_be_phys(&address_space_memory, list + 4);
- list += 8;
+ pvr_mask = ldl_be_phys(&address_space_memory, *addr);
+ pvr = ldl_be_phys(&address_space_memory, *addr + 4);
+ *addr += 8;
if (~pvr_mask & pvr) {
break; /* Terminator record */
@@ -1090,17 +1081,38 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
/* We couldn't find a suitable compatibility mode, and either
* the guest doesn't support "raw" mode for this CPU, or raw
* mode is disabled because a maximum compat mode is set */
- return H_HARDWARE;
+ error_setg(errp, "Couldn't negotiate a suitable PVR during CAS");
+ return 0;
}
/* Parsing finished */
trace_spapr_cas_pvr(cpu->compat_pvr, explicit_match, best_compat);
- /* Update CPUs */
- if (cpu->compat_pvr != best_compat) {
- Error *local_err = NULL;
+ return best_compat;
+}
- ppc_set_compat_all(best_compat, &local_err);
+static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
+ sPAPRMachineState *spapr,
+ target_ulong opcode,
+ target_ulong *args)
+{
+ /* Working address in data buffer */
+ target_ulong addr = ppc64_phys_to_real(args[0]);
+ target_ulong ov_table;
+ uint32_t cas_pvr;
+ sPAPROptionVector *ov1_guest, *ov5_guest, *ov5_cas_old, *ov5_updates;
+ bool guest_radix;
+ Error *local_err = NULL;
+
+ cas_pvr = cas_check_pvr(cpu, &addr, &local_err);
+ if (local_err) {
+ error_report_err(local_err);
+ return H_HARDWARE;
+ }
+
+ /* Update CPUs */
+ if (cpu->compat_pvr != cas_pvr) {
+ ppc_set_compat_all(cas_pvr, &local_err);
if (local_err) {
error_report_err(local_err);
return H_HARDWARE;
@@ -1108,7 +1120,7 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
}
/* For the future use: here @ov_table points to the first option vector */
- ov_table = list;
+ ov_table = addr;
ov1_guest = spapr_ovec_parse_vector(ov_table, 1);
ov5_guest = spapr_ovec_parse_vector(ov_table, 5);