diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2018-07-02 19:07:19 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2018-07-02 19:07:19 +0100 |
commit | e8c858944ea61923ca563bb5905bf04624d05f16 (patch) | |
tree | 6913a400986ecd3835c60163208326c398556d69 /hw/ppc/spapr.c | |
parent | ab08440a4ee09032d1a9cb22fdcab23bc7e1c656 (diff) | |
parent | c40d479207b1bb6569ffde06e9a58e85cd529de0 (diff) |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* IEC units series (Philippe)
* Hyper-V PV TLB flush (Vitaly)
* git archive detection (Daniel)
* host serial passthrough fix (David)
* NPT support for SVM emulation (Jan)
* x86 "info mem" and "info tlb" fix (Doug)
# gpg: Signature made Mon 02 Jul 2018 16:18:21 BST
# gpg: using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>"
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini/tags/for-upstream: (50 commits)
tcg: simplify !CONFIG_TCG handling of tb_invalidate_*
i386/monitor.c: make addresses canonical for "info mem" and "info tlb"
target-i386: Add NPT support
serial: Open non-block
bsd-user: Use the IEC binary prefix definitions
linux-user: Use the IEC binary prefix definitions
tests/crypto: Use the IEC binary prefix definitions
vl: Use the IEC binary prefix definitions
monitor: Use the IEC binary prefix definitions
cutils: Do not include "qemu/units.h" directly
hw/rdma: Use the IEC binary prefix definitions
hw/virtio: Use the IEC binary prefix definitions
hw/vfio: Use the IEC binary prefix definitions
hw/sd: Use the IEC binary prefix definitions
hw/usb: Use the IEC binary prefix definitions
hw/net: Use the IEC binary prefix definitions
hw/i386: Use the IEC binary prefix definitions
hw/ppc: Use the IEC binary prefix definitions
hw/mips: Use the IEC binary prefix definitions
hw/mips/r4k: Constify params_size
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ppc/spapr.c')
-rw-r--r-- | hw/ppc/spapr.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b32b971a14..1602472165 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2322,17 +2322,17 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp) if (machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) { error_setg(errp, "Memory size 0x" RAM_ADDR_FMT - " is not aligned to %llu MiB", + " is not aligned to %" PRIu64 " MiB", machine->ram_size, - SPAPR_MEMORY_BLOCK_SIZE / M_BYTE); + SPAPR_MEMORY_BLOCK_SIZE / MiB); return; } if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE) { error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT - " is not aligned to %llu MiB", + " is not aligned to %" PRIu64 " MiB", machine->ram_size, - SPAPR_MEMORY_BLOCK_SIZE / M_BYTE); + SPAPR_MEMORY_BLOCK_SIZE / MiB); return; } @@ -2340,9 +2340,9 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp) if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) { error_setg(errp, "Node %d memory size 0x%" PRIx64 - " is not aligned to %llu MiB", + " is not aligned to %" PRIu64 " MiB", i, numa_info[i].node_mem, - SPAPR_MEMORY_BLOCK_SIZE / M_BYTE); + SPAPR_MEMORY_BLOCK_SIZE / MiB); return; } } @@ -2763,7 +2763,7 @@ static void spapr_machine_init(MachineState *machine) } } - if (spapr->rma_size < (MIN_RMA_SLOF << 20)) { + if (spapr->rma_size < (MIN_RMA_SLOF * MiB)) { error_report( "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)", MIN_RMA_SLOF); @@ -3209,7 +3209,7 @@ static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, if (size % SPAPR_MEMORY_BLOCK_SIZE) { error_setg(errp, "Hotplugged memory size must be a multiple of " - "%lld MB", SPAPR_MEMORY_BLOCK_SIZE / M_BYTE); + "%" PRIu64 " MB", SPAPR_MEMORY_BLOCK_SIZE / MiB); return; } @@ -3961,7 +3961,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = 1024; mc->no_parallel = 1; mc->default_boot_order = ""; - mc->default_ram_size = 512 * M_BYTE; + mc->default_ram_size = 512 * MiB; mc->kvm_type = spapr_kvm_type; machine_class_allow_dynamic_sysbus_dev(mc, TYPE_SPAPR_PCI_HOST_BRIDGE); mc->pci_allow_0_address = true; |