diff options
| author | BALATON Zoltan <balaton@eik.bme.hu> | 2018-04-06 00:42:48 +0200 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-04-10 10:05:38 +1000 |
| commit | f8815532dcf145dfde8da42697556239bb95c849 (patch) | |
| tree | b14e321555b3e855c76bae6b84567210e9de30b2 /hw/ppc/ppc440_uc.c | |
| parent | 99b336cdd906ba467a5fa0a1c4face3a9bde8d77 (diff) | |
sam460ex: Fix timer frequency and clock multipliers
We only emulate timer running at CPU frequency which is what most
guests expect so set the frequency to match real hardware. This also
allows setting clock multipliers which caused slowdown previously due
to wrong timer frequency.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/ppc440_uc.c')
| -rw-r--r-- | hw/ppc/ppc440_uc.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 976ab2b5d8..e312fdba70 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -392,8 +392,7 @@ static uint32_t dcr_read_sdr(void *opaque, int dcrn) case SDR0_CFGDATA: switch (sdr->addr) { case SDR0_STRP0: - /* FIXME: Is this correct? This breaks timing in U-Boot */ - ret = 0; /*(0xb5 << 8) | (1 << 4) | 9 */ + ret = (0xb5 << 8) | (1 << 4) | 9; break; case SDR0_STRP1: ret = (5 << 29) | (2 << 26) | (1 << 24); |