diff options
| author | BALATON Zoltan <balaton@eik.bme.hu> | 2022-09-24 14:28:01 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-10-17 16:15:09 -0300 |
| commit | 3db19f124a14e8029d693dc10e031f3611a119bb (patch) | |
| tree | 5c6d79e30b7baec2603a8524b758d61db6ef302d /hw/ppc/ppc440_uc.c | |
| parent | 03f7041bfdc45f6c981a83fd2d932bad161769ad (diff) | |
ppc440_sdram: Rename local variable for readability
Rename local sdram variable in ppc440_sdram_init to s for readability.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <7351b80fa321c32a6229e685dfdc940232f8b788.1664021647.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/ppc/ppc440_uc.c')
| -rw-r--r-- | hw/ppc/ppc440_uc.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index e8bc088c8f..97e6d5f5b2 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -734,40 +734,40 @@ static void sdram_reset(void *opaque) void ppc440_sdram_init(CPUPPCState *env, int nbanks, Ppc4xxSdramBank *ram_banks) { - ppc440_sdram_t *sdram; + ppc440_sdram_t *s; int i; - sdram = g_malloc0(sizeof(*sdram)); - sdram->nbanks = nbanks; + s = g_malloc0(sizeof(*s)); + s->nbanks = nbanks; for (i = 0; i < nbanks; i++) { - sdram->bank[i].ram = ram_banks[i].ram; - sdram->bank[i].base = ram_banks[i].base; - sdram->bank[i].size = ram_banks[i].size; + s->bank[i].ram = ram_banks[i].ram; + s->bank[i].base = ram_banks[i].base; + s->bank[i].size = ram_banks[i].size; } - qemu_register_reset(&sdram_reset, sdram); + qemu_register_reset(&sdram_reset, s); ppc_dcr_register(env, SDRAM0_CFGADDR, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM0_CFGDATA, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_R0BAS, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_R1BAS, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_R2BAS, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_R3BAS, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_CONF1HB, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_PLBADDULL, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_CONF1LL, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_CONFPATHB, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM_PLBADDUHB, - sdram, &dcr_read_sdram, &dcr_write_sdram); + s, &dcr_read_sdram, &dcr_write_sdram); } void ppc440_sdram_enable(CPUPPCState *env) |