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authorBALATON Zoltan <balaton@eik.bme.hu>2018-07-31 13:08:00 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2018-08-01 11:01:38 +1000
commit6484ab3dffadc79020a71376010f517d60b81b83 (patch)
treec5851a2628797a459098f1e1e65652314e791747 /hw/ppc/ppc440_pcix.c
parent1069a3c6e1176001116116629427550f138d68a4 (diff)
sam460ex: Fix PCI interrupts with multiple devices
The four interrupts of the PCI bus are connected to the same UIC pin on the real Sam460ex. Evidence for this can be found in the UBoot source for the Sam460ex in the Sam460ex.c file where PCI_INTERRUPT_LINE is written. Change the ppc440_pcix model to behave more like this. This fixes the problem that can be observed when adding further PCI cards that got their interrupt rotated to other interrupts than PCI INT A. In particular, the bug was observed with an additional OHCI PCI card or an ES1370 sound device. Signed-off-by: Sebastian Bauer <mail@sebastianbauer.info> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Tested-by: Sebastian Bauer <mail@sebastianbauer.info> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/ppc440_pcix.c')
-rw-r--r--hw/ppc/ppc440_pcix.c21
1 files changed, 8 insertions, 13 deletions
diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c
index d8af04b70f..64ed07afa6 100644
--- a/hw/ppc/ppc440_pcix.c
+++ b/hw/ppc/ppc440_pcix.c
@@ -57,7 +57,7 @@ typedef struct PPC440PCIXState {
struct PLBOutMap pom[PPC440_PCIX_NR_POMS];
struct PLBInMap pim[PPC440_PCIX_NR_PIMS];
uint32_t sts;
- qemu_irq irq[PCI_NUM_PINS];
+ qemu_irq irq;
AddressSpace bm_as;
MemoryRegion bm;
@@ -418,21 +418,20 @@ static void ppc440_pcix_reset(DeviceState *dev)
* This may need further refactoring for other boards. */
static int ppc440_pcix_map_irq(PCIDevice *pci_dev, int irq_num)
{
- int slot = pci_dev->devfn >> 3;
- trace_ppc440_pcix_map_irq(pci_dev->devfn, irq_num, slot);
- return slot - 1;
+ trace_ppc440_pcix_map_irq(pci_dev->devfn, irq_num, 0);
+ return 0;
}
static void ppc440_pcix_set_irq(void *opaque, int irq_num, int level)
{
- qemu_irq *pci_irqs = opaque;
+ qemu_irq *pci_irq = opaque;
trace_ppc440_pcix_set_irq(irq_num);
if (irq_num < 0) {
error_report("%s: PCI irq %d", __func__, irq_num);
return;
}
- qemu_set_irq(pci_irqs[irq_num], level);
+ qemu_set_irq(*pci_irq, level);
}
static AddressSpace *ppc440_pcix_set_iommu(PCIBus *b, void *opaque, int devfn)
@@ -471,19 +470,15 @@ static int ppc440_pcix_initfn(SysBusDevice *dev)
{
PPC440PCIXState *s;
PCIHostState *h;
- int i;
h = PCI_HOST_BRIDGE(dev);
s = PPC440_PCIX_HOST_BRIDGE(dev);
- for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
- sysbus_init_irq(dev, &s->irq[i]);
- }
-
+ sysbus_init_irq(dev, &s->irq);
memory_region_init(&s->busmem, OBJECT(dev), "pci bus memory", UINT64_MAX);
h->bus = pci_register_root_bus(DEVICE(dev), NULL, ppc440_pcix_set_irq,
- ppc440_pcix_map_irq, s->irq, &s->busmem,
- get_system_io(), PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
+ ppc440_pcix_map_irq, &s->irq, &s->busmem,
+ get_system_io(), PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS);
s->dev = pci_create_simple(h->bus, PCI_DEVFN(0, 0), "ppc4xx-host-bridge");