diff options
| author | Cédric Le Goater <clg@kaod.org> | 2022-08-17 17:08:29 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-08-31 14:08:06 -0300 |
| commit | da116a8aab47695a8364708f2e1d14ed6fcc659f (patch) | |
| tree | 9d8b3fc8e9f78a7689c2ec4b01a9d3be30d82daa /hw/ppc/ppc405_uc.c | |
| parent | 695bce07dc1c0f7de054fb471a494d572e649e07 (diff) | |
ppc/ppc405: QOM'ify MAL
The Memory Access Layer (MAL) controller is currently modeled as a DCR
device with 4 IRQs. Also drop the ppc4xx_mal_init() helper and adapt
the sam460ex machine.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes, add finalize method]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <d54a243dff94d95ba30dbcc09c27700a90ade932.1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/ppc/ppc405_uc.c')
| -rw-r--r-- | hw/ppc/ppc405_uc.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 9ed3ce4ebe..b02dab05b3 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -1375,6 +1375,8 @@ static void ppc405_soc_instance_init(Object *obj) object_initialize_child(obj, "pob", &s->pob, TYPE_PPC405_POB); object_initialize_child(obj, "plb", &s->plb, TYPE_PPC405_PLB); + + object_initialize_child(obj, "mal", &s->mal, TYPE_PPC4xx_MAL); } static void ppc405_reset(void *opaque) @@ -1385,7 +1387,6 @@ static void ppc405_reset(void *opaque) static void ppc405_soc_realize(DeviceState *dev, Error **errp) { Ppc405SoCState *s = PPC405_SOC(dev); - qemu_irq mal_irqs[4]; CPUPPCState *env; SysBusDevice *sbd; int i; @@ -1503,11 +1504,15 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp) } /* MAL */ - mal_irqs[0] = qdev_get_gpio_in(s->uic, 11); - mal_irqs[1] = qdev_get_gpio_in(s->uic, 12); - mal_irqs[2] = qdev_get_gpio_in(s->uic, 13); - mal_irqs[3] = qdev_get_gpio_in(s->uic, 14); - ppc4xx_mal_init(env, 4, 2, mal_irqs); + object_property_set_int(OBJECT(&s->mal), "txc-num", 4, &error_abort); + object_property_set_int(OBJECT(&s->mal), "rxc-num", 2, &error_abort); + if (!ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(&s->mal), &s->cpu, errp)) { + return; + } + sbd = SYS_BUS_DEVICE(&s->mal); + for (i = 0; i < ARRAY_SIZE(s->mal.irqs); i++) { + sysbus_connect_irq(sbd, i, qdev_get_gpio_in(s->uic, 11 + i)); + } /* Ethernet */ /* Uses UIC IRQs 9, 15, 17 */ |