diff options
| author | Cédric Le Goater <clg@kaod.org> | 2022-08-17 17:08:21 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-08-31 14:08:06 -0300 |
| commit | 269fbb5b8ac0506b872ad3df277f23de1856ed15 (patch) | |
| tree | 86edd979e869d450c98f4de2e87ec6605d306cda /hw/ppc/ppc405.h | |
| parent | 4a7d2b7e5cebd00bdcc842517174ad33fd4934cb (diff) | |
ppc/ppc405: QOM'ify GPT
The GPT controller is currently modeled as a SysBus device with a
unique memory region, a couple of IRQs and a timer.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[balaton: ppc4xx_dcr_register changes, add finalize method]
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <8950ab26e78173f94ba65bc61bcfd0631de1fe61.1660746880.git.balaton@eik.bme.hu>
[danielhb: check if timer != NULL in ppc405_gpt_finalize()]
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/ppc/ppc405.h')
| -rw-r--r-- | hw/ppc/ppc405.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h index 2ba829988d..bcf55e4f6b 100644 --- a/hw/ppc/ppc405.h +++ b/hw/ppc/ppc405.h @@ -63,6 +63,27 @@ struct ppc4xx_bd_info_t { uint32_t bi_iic_fast[2]; }; +/* General purpose timers */ +#define TYPE_PPC405_GPT "ppc405-gpt" +OBJECT_DECLARE_SIMPLE_TYPE(Ppc405GptState, PPC405_GPT); +struct Ppc405GptState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + + int64_t tb_offset; + uint32_t tb_freq; + QEMUTimer *timer; + qemu_irq irqs[5]; + uint32_t oe; + uint32_t ol; + uint32_t im; + uint32_t is; + uint32_t ie; + uint32_t comp[5]; + uint32_t mask[5]; +}; + #define TYPE_PPC405_CPC "ppc405-cpc" OBJECT_DECLARE_SIMPLE_TYPE(Ppc405CpcState, PPC405_CPC); @@ -114,6 +135,7 @@ struct Ppc405SoCState { PowerPCCPU cpu; DeviceState *uic; Ppc405CpcState cpc; + Ppc405GptState gpt; }; /* PowerPC 405 core */ |